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SY89823LHY

Description
Clock Multiplexer 22-OUT 2-IN 1:22 64-Pin TQFP EP Tray
File Size118KB,8 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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SY89823LHY Overview

Clock Multiplexer 22-OUT 2-IN 1:22 64-Pin TQFP EP Tray

SY89823LHY Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusActive
TypeClock Multiplexer
Fanout1:22
Number of Outputs per Chip22
Maximum Propagation Delay Time @ Maximum CL (ns)1.3@3.135V to 3.465V
Absolute Propagation Delay Time (ns)1.7
Input Logic LevelLVPECL|HSTL
Output Logic LevelHSTL
Minimum Operating Supply Voltage (V)3.15
Typical Operating Supply Voltage (V)3.3
Maximum Operating Supply Voltage (V)3.45
Maximum Quiescent Current (mA)170
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
Supplier Temperature GradeIndustrial
PackagingTray
Supplier PackageTQFP EP
Pin Count64
Standard Package NameQFP
MountingSurface Mount
Package Height1
Package Length10
Package Width10
PCB changed64
Lead ShapeGull-wing
Micrel, Inc.
3.3V, 500MHz 1:22
DIFFERENTIAL HSTL (1.5V)
FANOUT BUFFER/TRANSLATOR
Precision Edge
®
SY89823L
Precision Edge
®
SY89823L
FEATURES
s
22 differential HSTL (low-voltage swing) output pairs
s
HSTL outputs drive 50
to ground with no offset
Precision Edge
®
voltage
s
3.3V core supply, 1.8V output supply for reduced
power
s
LVPECL and HSTL inputs
s
Low part-to-part skew (200ps max.)
s
Low pin-to-pin skew (50ps max.)
s
Triple-buffered output enable (OE)
s
–40
°
C to +85
°
C temperature range
s
Available in a 64-pin EPAD-TQFP
DESCRIPTION
The SY89823L is a high-performance bus clock driver with 22
differential High-Speed Transceiver Logic (HSTL), 1.5V compatible
output pairs. The device is designed for use in low-voltage (3.3V/
1.8V) applications that require a large number of outputs to drive
precisely aligned, ultra-low skew signals to their destination. The
input is multiplexed from either HSTL or Low-Voltage Positive-
Emitter-Coupled Logic (LVPECL) by the CLK_SEL pin.
The Output Enable (OE) is synchronous and triple-buffered so
that the outputs will only be enabled/disabled when they are already
in the LOW state. This avoids any potential of generating a runt clock
pulse when the device is enabled/disabled, as can occur with an
asynchronous control. The triple-buffering feature provides a three-
clock delay from the time the OE input is asserted/de-asserted to
when the clock appears at the outputs.
The SY89823L features low pin-to-pin skew (50ps max.) and low
part-to-part skew (200ps max.), performance previously unachievable
in a standard product having such a high number of outputs. The
SY89823L is available in a single, space-saving package, enabling
a lower overall cost solution.
All support documentation can be found on Micrel’s web site at:
www.micrel.com.
APPLICATIONS
s
High-performance PCs
s
Workstations
s
Parallel processor-based systems
s
Other high-performance computing
s
Communications
LOGIC SYMBOL
CLK_SEL
HSTL_CLK
/HSTL_CLK
TRUTH TABLE
OE
(1)
0
0
22
22
Q0 - Q21
/Q0 - /Q21
CLK_SEL
0
1
0
1
Q
0
-Q
21
LOW
LOW
HSTL_CLK
LVPECL_CLK
/Q
0
-/Q
21
HIGH
HIGH
/HSTL_CLK
/LVPECL_CLK
0
1
1
Note:
EN
ENABLE
LOGIC
LVPECL_CLK
1
/LVPECL_CLK
1.
The output enable (OE) signal is synchronized with the low level of the
HSTL_CLK and LVPECL_CLK signal.
OE
TYPICAL PERFORMANCE
900
OUTPUT AMPLITUDE (mV)
Output Amplitude
vs. Frequency
800
700
600
500
400
300
200
100
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
Precision Edge is a registered trademark of Micrel, Inc.
M9999-091908
hbwhelp@micrel.com or (408) 955-1690
OUTPUT FREQUENCY (GHz)
Rev.: D
Amendment: /0
1
Issue Date: September 2008

SY89823LHY Related Products

SY89823LHY SY89823LHY-TR
Description Clock Multiplexer 22-OUT 2-IN 1:22 64-Pin TQFP EP Tray Clock Multiplexer 22-OUT 2-IN 1:22 64-Pin TQFP EP T/R
EU restricts the use of certain hazardous substances Compliant Compliant
ECCN (US) EAR99 EAR99
Part Status Active Active
Type Clock Multiplexer Clock Multiplexer
Fanout 1:22 1:22
Number of Outputs per Chip 22 22
Maximum Propagation Delay Time @ Maximum CL (ns) 1.3@3.135V to 3.465V 1.3@3.135V to 3.465V
Absolute Propagation Delay Time (ns) 1.7 1.7
Input Logic Level LVPECL|HSTL HSTL|LVPECL
Output Logic Level HSTL HSTL
Minimum Operating Supply Voltage (V) 3.15 3.15
Typical Operating Supply Voltage (V) 3.3 3.3
Maximum Operating Supply Voltage (V) 3.45 3.45
Maximum Quiescent Current (mA) 170 170
Minimum Operating Temperature (°C) -40 -40
Maximum Operating Temperature (°C) 85 85
Supplier Temperature Grade Industrial Industrial
Packaging Tray Tape and Reel
Supplier Package TQFP EP TQFP EP
Pin Count 64 64
Standard Package Name QFP QFP
Mounting Surface Mount Surface Mount
Package Height 1 1
Package Length 10 10
Package Width 10 10
PCB changed 64 64
Lead Shape Gull-wing Gull-wing
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