8-Channel/4-Channel
Fault-Protected Analog Multiplexers
ADG508F/ADG509F
FEATURES
All switches off with power supply off
Analog output of on channel clamped within power
supplies if an overvoltage occurs
Latch-up proof construction
Low on resistance (270 Ω typical)
Fast switching times
t
ON
: 230 ns maximum
t
OFF
: 130 ns maximum
Low power dissipation (3.3 mW maximum)
Fault and overvoltage protection (−40 V to +55 V)
Break-before-make construction
TTL and CMOS compatible inputs
FUNCTIONAL BLOCK DIAGRAMS
ADG508F
S1
D
S8
1 OF 8
DECODER
00035-001
APPLICATIONS
Existing multiplexer applications (both fault-protected and
nonfault-protected)
New designs requiring multiplexer functions
A0 A1 A2 EN
Figure 1.
ADG509F
S1A
DA
S4A
GENERAL DESCRIPTION
The
ADG508F
and
ADG509F
are CMOS analog multi-
plexers, with the
ADG508F
comprising eight single channels
and the
ADG509F
comprising four differential channels. These
multiplexers provide fault protection. Using a series n-channel,
p-channel, n-channel MOSFET structure, both device and signal
source protection is provided in the event of an overvoltage or
power loss. The multiplexer can withstand continuous overvolt-
age inputs from −40 V to +55 V. During fault conditions with
power supplies off, the multiplexer input (or output) appears as
an open circuit and only a few nanoamperes of leakage current
will flow. This protects not only the multiplexer and the circuitry
driven by the multiplexer, but also protects the sensors or signal
sources that drive the multiplexer.
The
ADG508F
switches one of eight inputs to a common output
as determined by the 3-bit binary address lines A0, A1, and A2.
The
ADG509F
switches one of four differential inputs to a
common differential output as determined by the 2-bit binary
address lines A0 and A1. An EN input on each device is used
to enable or disable the device. When disabled, all channels are
switched off.
S1B
DB
S4B
1 OF 4
DECODER
00035-101
A0 A1 EN
Figure 2.
PRODUCT HIGHLIGHTS
1.
Fault protection. The
ADG508F/ADG509F
can withstand
continuous voltage inputs from −40 V to +55 V. When a
fault occurs due to the power supplies being turned off, all
the channels are turned off and only a leakage current of a
few nanoamperes flows.
On channel saturates while fault exists.
Low R
ON
.
Fast switching times.
Break-before-make switching. Switches are guaranteed
break-before-make so that input signals are protected
against momentary shorting.
Trench isolation eliminates latch-up. A dielectric trench
separates the p and n-channel MOSFETs thereby
preventing latch-up.
2.
3.
4.
5.
6.
Rev. F
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2011 Analog Devices, Inc. All rights reserved.
ADG508F/ADG509F
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Truth Tables................................................................................... 4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics ..............................................8
Terminology .................................................................................... 10
Theory of Operation ...................................................................... 11
Test Circuits..................................................................................... 12
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 17
REVISION HISTORY
7/11—Rev. E to Rev. F
Deleted ADG528F ..............................................................Universal
Changes to Features Section and General Description Section . 1
Changes to Specifications Section.................................................. 3
Deleted Timing Diagrams Section ................................................. 4
Changes to Table 4............................................................................ 5
Added Table 5.................................................................................... 6
Added Table 6.................................................................................... 7
Replaced Typical Performance Characteristics Section .............. 8
Changes to Terminology Section.................................................. 10
Changes to Figure 27 and Figure 28............................................. 13
Changes to Figure 31...................................................................... 14
Changes to Theory of Operation Section.................................... 11
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 17
7/09—Rev. D: Rev. E
Updated Format..................................................................Universal
Added TSSOP .....................................................................Universal
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 18
4/01—Data Sheet Changed from Rev. C to Rev. D.
Changes to Ordering Guide ............................................................ 1
Changes to Specifications Table...................................................... 2
Max Ratings Changed ...................................................................... 4
Deleted 16-Lead Cerdip from Outline Dimensions .................. 11
Deleted 18-Lead Cerdip from Outline Dimensions .................. 12
Rev. F | Page 2 of 20
ADG508F/ADG509F
SPECIFICATIONS
DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
+25°C
V
SS
+ 1.4
V
DD
− 1.4
V
SS
+ 2.2
V
DD
– 2.2
270
B Version
−40°C to +85°C
Unit
V typ
V typ
V typ
V typ
Ω typ
Ω max
%/°C typ
% max
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
nA typ
μA max
nA typ
μA max
nA typ
μA max
2.4
0.8
±1
5
175
220
90
60
180
230
100
130
V min
V max
μA max
pF typ
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
μs typ
μs typ
Test Conditions/Comments
Output open circuit
Output loaded, 1 mA
−10 V ≤ V
S
≤ +10 V, I
S
= 1 mA;
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%
See Figure 21
V
S
= 0 V, I
S
= 1 mA
V
S
= ±10 V, I
S
= −1 mA
V
D
= ±10 V, V
S
= +10 V;
See Figure 22
V
D
= ±10 V, V
S
= +10 V;
See Figure 23
V
S
= V
D
= ± 10 V;
See Figure 24
R
ON
350
390
R
ON
Drift
On-Resistance Match Between
Channels, ∆R
ON
LEAKAGE CURRENTS
Source Off Leakage I
S
(Off )
Drain Off Leakage I
D
(Off )
ADG508F
ADG509F
Channel On Leakage I
D
, I
S
(On)
ADG508F
ADG509F
FAULT
Source Leakage Current I
S
(Fault)
(With Overvoltage)
Drain Leakage Current I
D
(Fault)
(With Overvoltage)
Source Leakage Current I
S
(Fault)
(Power Supplies Off )
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
1
t
TRANSITION
t
OPEN
t
ON
(EN)
t
OFF
(EN)
t
SETT
, Settling Time
0.1%
0.01%
0.6
3
±0.02
±1
±0.04
±1
±1
±0.04
±1
±1
±0.02
±2
±5
±2
±1
±2
±50
±60
±30
±60
±30
V
S
= +55 V or −40 V, V
D
= 0 V, see Figure 25
V
S
= ±25 V, V
D
= +10 V, see Figure 23
±2
V
S
= ±25 V, V
D
= V
EN
= A0, A1, A2 = 0 V
See Figure 26
V
IN
= 0 or V
DD
300
40
300
150
1
2.5
R
L
= 1 MΩ, C
L
= 35 pF;
V
S1
= ±10 V, V
S8
= +10 V; see Figure 27
R
L
= 1 kΩ, C
L
= 35 pF;
V
S
= 5 V; see Figure 28
R
L
= 1 kΩ, C
L
= 35 pF;
V
S
= 5 V; see Figure 29
R
L
= 1 kΩ, C
L
= 35 pF
V
S
= 5 V; see Figure 29
R
L
= 1 kΩ, C
L
= 35 pF;
V
S
= 5 V
Rev. F | Page 3 of 20
ADG508F/ADG509F
Parameter
Charge Injection
Off Isolation
C
S
(Off )
C
D
(Off )
ADG508F
ADG509F
POWER REQUIREMENTS
I
DD
I
SS
1
+25°C
15
93
3
22
12
0.05
0.1
B Version
−40°C to +85°C
Unit
pC typ
dB typ
pF typ
pF typ
pF typ
Test Conditions/Comments
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 30
R
L
= 1 kΩ, C
L
= 15 pF, f = 100 kHz; V
S
= 7 V rms;
see Figure 31
0.2
1
mA max
μA max
V
IN
= 0 V or 5 V
Guaranteed by design, not subject to production test.
TRUTH TABLES
Table 2.
ADG508F
Truth Table
1
A2
X
0
0
0
0
1
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
On Switch
None
1
2
3
4
5
6
7
8
X = don’t care.
Table 3.
ADG509F
Truth Table
1
A1
X
0
0
1
1
1
A0
X
0
1
0
1
EN
0
1
1
1
1
On Switch Pair
None
1
2
3
4
X = don’t care.
Rev. F | Page 4 of 20
ADG508F/ADG509F
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C unless otherwise noted.
Table 4.
Parameter
V
DD
to V
SS
V
DD
to GND
V
SS
to GND
Digital Input, EN, Ax
V
S
, Analog Input Overvoltage with
Power On (V
DD
= +15 V, V
SS
= −15 V)
V
S
, Analog Input Overvoltage with
Power Off (V
DD
= 0 V, V
SS
= 0 V)
Continuous Current, S or D
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
TSSOP
θ
JA
, Thermal Impedance
Plastic DIP Package
θ
JA
, Thermal Impedance
16-Lead
SOIC Package
θ
JA
, Thermal Impedance
Narrow Body
Wide Body
Rating
48 V
−0.3 V to +48 V
+0.3 V to −48 V
−0.3 V to V
DD
+ 0.3 V or
20 mA, whichever occurs first
V
SS
− 25 V to V
DD
+ 40 V
−40 V to +55 V
20 mA
40 mA
−40°C to +85°C
−65°C to +150°C
150°C
112°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
117°C/W
77°C/W
75°C/W
Rev. F | Page 5 of 20
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