EP1C6F324I6ES datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> Programmable logic devices> EP1C6F324I6ES

EP1C6F324I6ES: DescriptionFPGA, 5980 CLBS, 275 MHz, PQFP144; Categorysemiconductor Programmable logic devices; File Size755KB，104 Pages; ManufacturerAltera (Intel)

Download Datasheet Parametric View All

EP1C6F324I6ES Overview

FPGA, 5980 CLBS, 275 MHz, PQFP144

EP1C6F324I6ES Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	144
Maximum supply/operating voltage	1.58 V
Minimum supply/operating voltage	1.42 V
Rated supply voltage	1.5 V
Processing package description	22 X 22 MM, 0.50 MM PITCH, LEAD FREE, TQFP-144
state	ACTIVE
packaging shape	SQUARE
Package Size	FLATPACK, LOW PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	TIN LEAD
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
organize	5980 CLBS
Maximum FCLK clock frequency	275 MHz
Number of configurable logic modules	5980
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY

Preview

Download Datasheet

View All

Section I. Cyclone FPGA

Family Data Sheet

This section provides designers with the data sheet specifications for

Cyclone

devices. The chapters contain feature definitions of the internal

architecture, configuration and JTAG boundary-scan testing information,

DC operating conditions, AC timing parameters, a reference to power

consumption, and ordering information for Cyclone devices.

This section contains the following chapters:

■

Chapter 1. Introduction

Chapter 2. Cyclone Architecture

Chapter 3. Configuration & Testing

Chapter 4. DC & Switching Characteristics

Chapter 5. Reference & Ordering Information

Revision History

Refer to each chapter for its own specific revision history. For information

on when each chapter was updated, refer to the Chapter Revision Dates

section, which appears in the complete handbook.

Altera Corporation

Section I–1

Preliminary

1. Introduction

C51001-1.4

Introduction

The Cyclone

field programmable gate array family is based on a 1.5-V,

0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic

elements (LEs) and up to 288 Kbits of RAM. With features like phase-

locked loops (PLLs) for clocking and a dedicated double data rate (DDR)

interface to meet DDR SDRAM and fast cycle RAM (FCRAM) memory

requirements, Cyclone devices are a cost-effective solution for data-path

applications. Cyclone devices support various I/O standards, including

LVDS at data rates up to 640 megabits per second (Mbps), and 66- and

33-MHz, 64- and 32-bit peripheral component interconnect (PCI), for

interfacing with and supporting ASSP and ASIC devices. Altera also

offers new low-cost serial configuration devices to configure Cyclone

devices.

The following shows the main sections in the Cyclone FPGA Family Data

Sheet:

Section

Page

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

Logic Array Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3

Logic Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5

MultiTrack Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–12

Embedded Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–18

Global Clock Network & Phase-Locked Loops. . . . . . . . . . . 2–29

I/O Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–39

Power Sequencing & Hot Socketing . . . . . . . . . . . . . . . . . . . . 2–55

IEEE Std. 1149.1 (JTAG) Boundary Scan Support . . . . . . . . . . 3–1

SignalTap II Embedded Logic Analyzer . . . . . . . . . . . . . . . . . 3–5

Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5

Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–8

Timing Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

Device Pin-Outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

Altera Corporation

January 2007

1–1

Preliminary

Recommended Resources

Two-stage resistor-capacitor coupling amplifier circuit

Differential Input Instrumentation Amplifier

One of the DC motor armature starting debugging circuits with resistors in series

Wire break tester circuit

Homemade USB interface powered mobile phone battery charger circuit diagram

DC motor reverse braking circuit

Problems encountered when learning protues software: I just started learning protues software and encountered this problem. Can anyone help me solve it? Thank you!!! When I select the components option to select components, why does the following prompt...; 易晋生 Embedded System

How do new employees face the new environment?: Xiao Feng, who has one year of work experience, recently changed jobs to another company. After completing the entry formalities, he immediately introduced himself to his colleagues. Faced with the pr...; ESD技术咨询 Talking about work

How to use DSP software waiting?: How to use software wait?DSP has a fast instruction cycle, so it is necessary to wait when accessing slow memory or peripherals. Waiting can be divided into hardware waiting and software waiting, and ...; Aguilera DSP and ARM Processors

How to pass member variables of a structure as parameters?: Assuming that structure a has been defined and its member variables are all integers, how can we implement the following function?fun (typedefvariable, int vlu ) {a-variable = vlu; }...; zhaojun_xf MCU

Common power supply and voltage regulator chip names (mostly from TI): Just look at the following names and you'll probably know the approximate functions of these chips. Collect it [color=#000][font=宋体][size=12px]LM2930T-5.0 5.0V low dropout voltage regulator [/size][/f...; qwqwqw2088 Power technology

The ECC function of the socfpga board I made myself was successfully started! ! ! !: [i=s] This post was last edited by yupc123 on 2016-1-22 14:51 [/i] The ECC function of the socfpga board I made was successfully started. Let me share my experience with you :) The driver I wrote was ...; yupc123 FPGA/CPLD

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components