PL
IA
N
T
Features
■
Lead free as standard
■
RoHS compliant*
■
Low capacitance - 1.3 pF
■
ESD protection >25 kV
■
Surge protection
Applications
■
Personal Digital Assistants (PDAs)
■
Notebook and PC computers
■
Memory card protection
■
SIM card port protection
■
Portable electronics
*R
oH
S
CO
M
CDSC706-0504C - Surface Mount TVS Diode Array
General Information
The CDSC706-0504C device provides ESD, EFT and Surge protection for high speed
data ports meeting IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5
(Surge) requirements. The Transient Voltage Suppressor array, protecting up to 4 data
lines, offers a Working Peak Reverse Voltage of 5 V and Minimum Breakdown Voltage
of 6 V.
The SC70-6L packaged device will mount directly onto the industry standard SC70-6
footprint. Bourns
®
Chip Diodes conform to JEDEC standards, are easy to handle with
standard pick and place equipment and the flat configuration minimizes roll away.
Thermal Characteristics (@ T
A
= 25 °C Unless Otherwise Noted)
Parameter
Peak Pulse Power (tp = 8/20 µs)
Storage Temperature
Operating Temperature
Operating Supply Voltage
ESD per IEC61000-4-2 (Air) (I/O Pins)
ESD per IEC61000-4-2 (Contact) (I/O Pins)
ESD per IEC61000-4-2 (Air) (V
CC
to GND)
ESD per IEC61000-4-2 (Contact) (V
CC
to
GND)
DC Voltage at any I/O Pin
Symbol
I
PP
T
STG
T
OPR
VDC
Vesd IO
5
1
3
4
6
2
CDSC706-0504C
6.5
-55 to +150
-55 to +85
6
18
14
30
30
(GND-0.5) to (VCC+0.5)
Unit
A
ºC
ºC
V
kV
kV
V
Vesd VCC
VIO
Electrical Characteristics (@ T
A
= 25 °C Unless Otherwise Noted)
Parameter
Maximum Reverse Standoff Voltage
1
Maximum Leakage Current
1
@ V
RWM
Maximum Channel Leakage Current @ V
RWM
Minimum Reverse Breakdown Voltage
1
@ I
BV
=1 mA
Maximum Forward Voltage
4
@ I
F
= 15 mA
Maximum Clamping Voltage
2
@ 5 A 8/20 µs
Typical ESD Clamping Voltage- I/O
2
Maximum Channel Input Capacitance
2
@ V
PIN5
=5 V, V
PIN2
=0 V, V
IN
=2.5 V, f=1 MHz
Max. Channel to Channel Input Capacitance
3
@ V
PIN5
=5 V, V
PIN2
=0 V, V
IN
=2.5 V, f=1 MHz
Max. Variation of Channel Input Capacitance
@ V
PIN5
=5 V, V
PIN2
=0 V, V
IN
=2.5 V, f=1 MHz
(I/O Pin to GND)
Notes:
1: Pin 5 to Pin 2 (ground)
2: Pin 1, 3, 4 or 6 to Pin 2 (ground)
Symbol
V
RWM
I
L
I
CD
V
BR
V
F
V
C
V
clamp io
C
IN
C
CROSS
ΔC
IN
CDSC706-0504C
5.0
5.0
1.0
6.0
1.0
9.0
12.5
1.6
0.14
0.07
3: Between any two of pins 1, 3, 4, 6.
4: Pin 2 (ground) to Pin 5
Unit
V
µA
µA
V
V
V
V
pF
pF
pF
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
CDSC706-0504C - Surface Mount TVS Diode Array
Product Dimensions
This is a molded JEDEC SC70-6L package with lead free 100 %
Matte Sn on the lead frame. It weighs approximately 7 mg and has a
flammability rating of UL 94V-0.
0.15 - 0.30
(0.006 - 0.012)
0.65
(0.026)
Recommended Footprint
1.72
(0.068)
1.30
(0.051)
0.10
(0.004)
0.65
(0.026)
0.50
(0.020)
1.15 - 1.35
(0.045 - 0.055)
0.26 - 0.46
(0.010 - 0.018)
0.08 - 0.25
(0.003 - 0.001)
0.60
(0.024)
6
5
4
2.00 - 2.20
(0.078 - 0.087)
0 - 10 °
1
2
3
1.30
(0.512)
1.90 - 2.15
(0.074 - 0.084)
0.80 - 1.00
(0.031 - 0.040)
DIMENSIONS = MILLIMETERS
(INCHES)
0.80 - 1.10
(0.031 - 0.043)
DIMENSIONS = MILLIMETERS
(INCHES)
Typical Part Marking
CDSC706-0504C........................................................................ C05
How to Order
Configuration
I/O 4
VDD
I/O 3
CD SC706 - 05 04 C
Common Code
Chip Diode
Package
SC706 = SC70-6L Package
Working Peak Reverse Voltage
05 = 5 V
RWM
(Volts)
Number of Lines
04 = 4 Data Lines
Suffix
C = Low Capacitance
6
5
4
1
I/O 1
2
GND
3
1/O 2
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
CDSC706-0504C - Surface Mount TVS Diode Array
Rating & Characteristic Curves
Clamping Voltage vs. Peak Pulse Current
12
11
10
9
8
7
6
5
4
3
2
1
0
4.5
Pulse Waveform
120
100
80
60
40
20
0
t
d
= t
|
I
PP
/2
t
t
I
PP
– Peak Pulse Current (% of I
PP
)
Clamping Voltage - Volts
Test Waveform Parameters
t
t
= 8 µs
t
d
= 20 µs
e
t
I/O pin to GND pin
Waveform
Parameters:
tr = 8 µs
td = 20 µs
6.0
6.5
7.0
7.5
5.0
5.5
0
5
10
15
t – Time (µs)
20
25
30
Peak Pulse Current (Amps)
Overshoot and Clamping Voltage
30
5 Volts per Division
25
15
5
2
-5
-72.000 ns
28.000 ns
128.000 ns
ESD Test Pulse: 25 kilovolt, 1/30 ns (waveshape)
0.2
Power Derating Curve
110
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
Ambient Temperature, TA (°C)
% of Rated Power or IPP
Input Capacitance (pF)
Forward Voltage vs. Forward Current
4.0
3.5
Forward Voltage - Volts
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
Peak Pulse Current (Amps)
I/O pin to GND pin
Waveform
Parameters:
tr = 8 µs
td = 20 µs
Typical Variation of Cin vs. Vin
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
VDD = 5 V, GND = 0 V, f = 1 MHz, T = 25 °C
1
2
3
4
6
Input Voltage (V)
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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