PD-90711C
POWER MOSFET
THRU-HOLE (TO-254AA)
Product Summary
Part Number
IRFMG50
IRFMG50
1000V, N-CHANNEL
HEXFET
MOSFET TECHNOLOGY
®
R
DS(on)
2.0Ω
I
D
5.6A
HEXFET
®
MOSFET technology is the key to International
Rectifier’s advanced line of power MOSFET transistors.
The efficient geometry design achieves very low on-state
resistance combined with high transconductance.
HEXFET transistors also feature all of the well-established
advantages of MOSFETs, such as voltage control, very
fast switching, ease of paralleling and electrical parameter
temperature stability. They are well-suited for applications
such as switching power supplies, motor controls,
inverters, choppers, audio amplifiers, high energy pulse
circuits, and virtually any application where high reliability
is required. The HEXFET transistor’s totally isolated
package eliminates the need for additional isolating
material between the device and the heatsink. This
improves thermal efficiency and reduces drain capacitance.
TO-254AA
Features:
n
n
n
n
n
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Electrically Isolated
Ceramic Eyelets
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25°C Continuous Drain Current
ID @ VGS = 10V, TC = 100°C Continuous Drain Current
IDM
Pulsed Drain Current
À
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Á
Avalanche Current
À
Repetitive Avalanche Energy
À
Peak Diode Recovery dv/dt
Â
Operating Junction
Storage Temperature Range
Lead Temperature
Weight
For footnotes refer to the last page
300(0.063in./1.6mm from case for 10 sec)
9.3 (Typical)
5.6
3.5
22.4
150
1.2
±20
860
5.6
15
1.0
-55 to 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
g
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1
06/23/08
IRFMG50
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
∆BV
DSS /∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Min
1000
—
—
2.0
5.2
—
—
—
—
—
—
—
—
—
—
—
—
Typ Max Units
—
1.4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.8
—
—
2.0
4.0
—
25
250
100
-100
200
20
110
30
44
210
60
—
V
V/°C
Ω
V
S
µA
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
VGS = 10V, ID = 3.5A
Ã
IGSS
IGSS
Qg
Q gs
Q gd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
nA
nC
VDS = VGS, ID = 250µA
VDS > 15V, IDS = 3.5A
Ã
VDS = 800V ,VGS=0V
VDS = 800V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =10V, ID = 5.6A
VDS = 400V
VDD = 400V, ID = 5.6A,
VGS =10V, RG =
2.35Ω
ns
nH
C iss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
2400
240
80
—
—
—
pF
Measured from Drain lead (6mm/
0.25in.) to Source lead (6mm
/0.25in.) from package
VGS = 0V, VDS = 25V
f = 1.0MHz
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
Q RR
ton
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode)
À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min Typ Max Units
—
—
—
—
—
—
—
—
—
—
5.6
22.4
1.8
1200
8.4
Test Conditions
A
V
ns
µC
T
j
= 25°C, IS = 5.6A, VGS = 0V
Ã
Tj = 25°C, IF = 5.6A, di/dt
≤
100A/µs
VDD
≤
50V
Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
RthCS
RthJA
Junction-to-Case
Case-to-sink
Junction-to-Ambient
Min Typ Max
—
—
—
— 0.83
0.21 —
—
48
Units
°C/W
Test Conditions
Typical socket mount
Note: Corresponding Spice and Saber models are available on International Rectifier Website.
For footnotes refer to the last page
2
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IRFMG50
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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IRFMG50
3
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFMG50
V
DS
V
GS
R
G
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
R
D
D.U.T.
+
-
V
DD
Fig 10a.
Switching Time Test Circuit
V
DS
90%
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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