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DG303ADY

Description
DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP14
CategoryAnalog mixed-signal IC    The signal circuit   
File Size97KB,10 Pages
ManufacturerTEMIC
Websitehttp://www.temic.de/
Download Datasheet Parametric View All

DG303ADY Overview

DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP14

DG303ADY Parametric

Parameter NameAttribute value
MakerTEMIC
Reach Compliance Codeunknow
Analog Integrated Circuits - Other TypesSPDT
JESD-30 codeR-PDSO-G14
Number of channels1
Number of functions2
Number of terminals14
Maximum on-state resistance (Ron)50 Ω
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
surface mountYES
Maximum connection time300 ns
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal locationDUAL
DG300A/301A/302A/303A
CMOS Analog Switches
Features
D
D
D
D
D
D
Analog Signal Range:
"15
V
Fast Switching—t
ON
: 150 ns
Low On-Resistance—r
DS(on)
: 30
W
Single Supply Operation
Latch-up Proof
CMOS Compatible
Benefits
D
Full Rail-to-Rail Analog Signal
Range
D
Low Signal Error
D
Low Power Dissipation
Applications
D
Low Level Switching Circuits
D
Programmable Gain Amplifiers
D
Portable and Battery Powered
Systems
Description
The DG300A-DG303A family of monolithic CMOS
switches feature three switch configuration options (SPST,
SPDT, and DPST) for precision applications in
communications, instrumentation and process control,
where low leakage switching combined with low power
consumption are required.
Designed on the Siliconix PLUS-40 CMOS process, these
switches are latch-up proof, and are designed to block up to
30 V peak-to-peak when off. An epitaxial layer prevents
latchup.
In the on condition the switches conduct equally well in
both directions (with no offset voltage) and minimize error
conditions with their low on-resistance.
Featuring low power consumption (3.5 mW typ) these
switches are ideal for battery powered applications, without
sacrificing
switching
speed.
Designed
for
break-before-make switching action, these devices are
CMOS and quasi TTL compatible. Single supply operation
is allowed by connecting the V– rail to 0 V.
Functional Block Diagram and Pin Configuration
DG300A
Dual-In-Line
NC
D
1
NC
S
1
NC
IN
1
GND
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
V+
D
2
NC
S
2
NC
IN
2
V–
NC
IN
1
3
S
1
2
D
1
DG300A
Metal Can
V+ (Substrate and Case)
D
2
9
8
Top View
4
6
5
GND
V–
7
S
2
1
10
Truth Table
Logic
0
IN
2
1
Switch
OFF
ON
Logic “0”
v
0.8 V
08
0
1
Logic “1”
w
4 V
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70044.
Siliconix
S-52880—Rev. C, 28-Apr-97
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