PLL620-20
Low Phase Noise XO (for HF Fund. and 3
rd
O.T.)
FEATURES
•
•
•
•
•
•
•
100MHz to 200MHz Fund. or 3
rd
OT Crystal.
Output range: 100 – 200MHz (no multiplication).
Available outputs: PECL, or LVDS.
OESEL/OECTRL for both PECL & LVDS.
Supports 2.5V or 3.3V-Power Supply.
Available in die form.
Die thickness 10 mil.
DIE CONFIGURATION
65 mil
Reserved
Reserved
VDD
VDD
VDD
VDD
N/C
N/C
(1550,1475)
17
16
25
24
23
22
21
20
19
18
GNDBUF
N/C
LVDSB
PECLB
VDDBUF
VDDBUF
PECL
LVDS
OUTSEL^
XIN
XOUT
N/C
62 mil
26
27
Die ID:
A1212-12
15
28
14
N/C
OE
CTRL
N/C
13
29
12
11
30
DESCRIPTION
The PLL620-20 is an XO IC specifically designed to
work with high frequency fundamental and third
overtone crystals. Its design was optimized to
tolerate higher limits of interelectrode capacitance
and bonding capacitance to improve yield. It
achieves very low current into the crystal resulting in
better overall stability. It is ideal for XO applications
requiring LVDS or PECL output levels at high
frequencies.
C502A
31
1
2
3
4
5
6
7
8
10
9
Reserved
Y
(0,0)
X
OUTPUT SELECTION AND ENABLE
Pad #9
OUTSEL
Selected Output
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
0
1
LVDS
PECL (default)
BLOCK DIAGRAM
Pad #9
OUTSEL
Pad #30
OE_CTRL
0
1
OE
X+
X-
Oscillator
Amplifier
0
1
0
1
Tri-state
Output enabled (default)
Output enabled (default)
Tri-state
Q
Q
Pad #9: Bond to GND to set to “0”, bond to VDD to set to “1”
Pad #30: Logical states defined by PECL levels if OUTSEL is “1”
Logical states defined by CMOS levels if OUTSEL is “0”
PLL620-20
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1
GNDBUF
State
GNDBUF
GND
GND
GND
GND
GND
PLL620-20
Low Phase Noise XO (for HF Fund. and 3
rd
O.T.)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
Crystal Resonator Frequency
Crystal Loading Rating
Interelectrode Capacitance
Recommended ESR
SYMBOL
F
XIN
C
L (xtal)
C
0
R
E
CONDITIONS
Fundamental or 3
rd
overtone*
Die
AT cut
MIN.
100
TYP.
MAX.
200
UNITS
MHz
pF
pF
Ω
5
5
30
* Note:
3
rd
overtone crystals require an external resistor between XIN and XOUT to prevent the fundamental from oscillating.
3. General Electrical Specifications
PARAMETERS
Supply Current (Loaded
Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
SYMBOL
I
DD
V
DD
CONDITIONS
PECL/LVDS
@ 1.25V (LVDS)
@ V
DD
– 1.3V (PECL)
MIN.
TYP.
MAX.
100/80
UNITS
mA
V
%
mA
2.97
45
45
50
50
±50
3.63
55
55
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 2
PLL620-20
Low Phase Noise XO (for HF Fund. and 3
rd
O.T.)
4. Jitter Specifications
PARAMETERS
Period jitter RMS at 155MHz
Period jitter peak-to-peak at 155MHz
Accumulated jitter RMS at 155MHz
Accumulated jitter peak-to-peak at
155MHz
Random Jitter
Integrated jitter RMS at 155MHz
CONDITIONS
At 155.52MHz, with capacitive
decoupling between VDD and
GND. Over 10,000 cycles
At 155.52MHz, with capacitive
decoupling between VDD and
GND. Over 1,000,000 cycles.
“RJ” measured on Wavecrest SIA
3000
Integrated 12 kHz to 20 MHz
MIN.
TYP.
2.5
18.5
2.5
24
2.5
0.3
MAX.
20
27
UNITS
ps
ps
ps
0.4
ps
Note: Higher Q factor of 3
rd
overtone crystals will result in even better jitter performance.
5. Phase Noise Specifications
PARAMETERS
Phase Noise relative
to carrier
FREQUENCY
155.52MHz
@10Hz
-75
@100Hz
-95
@1kHz
-125
@10kHz
-140
@100kHz
-145
UNITS
dBc/Hz
Note: Higher Q factor of 3
rd
overtone crystals will result in even better phase noise performance.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 3
PLL620-20
Low Phase Noise XO (for HF Fund. and 3
rd
O.T.)
6
. LVDS Electrical Characteristics
PARAMETERS
Output Differential Voltage
V
DD
Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
SYMBOL
V
OD
∆V
OD
V
OH
V
OL
V
OS
∆V
OS
I
OXD
I
OSD
CONDITIONS
MIN.
247
-50
TYP.
355
1.4
MAX.
454
50
1.6
1.375
25
±10
-8
UNITS
mV
mV
V
V
V
mV
uA
mA
R
L
= 100
Ω
(see figure)
0.9
1.125
0
1.1
1.2
3
±1
-5.7
V
out
= V
DD
or GND
V
DD
= 0V
7. LVDS Switching Characteristics
PARAMETERS
Differential Clock Rise Time
Differential Clock Fall Time
LVDS Levels Test Circuit
OUT
SYMBOL
t
r
t
f
CONDITIONS
R
L
= 100
Ω
C
L
= 10 pF
(see figure)
MIN.
0.2
0.2
TYP.
0.7
0.7
MAX.
1.0
1.0
UNITS
ns
ns
LVDS Switching Test Circuit
OUT
C
L
= 10pF
50Ω
V
OD
V
OS
V
DIFF
R
L
= 100Ω
50Ω
C
L
= 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
0V (Differential)
OUT
80%
V
DIFF
20%
0V
80%
20%
t
R
t
F
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 4
PLL620-20
Low Phase Noise XO (for HF Fund. and 3
rd
O.T.)
8. PECL Electrical Characteristics
PARAMETERS
Output High Voltage
Output Low Voltage
SYMBOL
V
OH
V
OL
CONDITIONS
R
L
= 50
Ω
to (V
DD
– 2V)
(see figure)
MIN.
V
DD
– 1.025
MAX.
V
DD
– 1.620
UNITS
V
V
9. PECL Switching Characteristics
PARAMETERS
Clock Rise Time
Clock Fall Time
SYMBOL
t
r
t
f
CONDITIONS
@20/80% - PECL
@80/20% - PECL
MIN.
TYP.
0.6
0.5
MAX.
1.5
1.5
UNITS
ns
ns
PECL Levels Test Circuit
OUT
VDD
OUT
PECL Output Skew
50Ω
2.0V
50%
50Ω
OUT
OUT
t
SKEW
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
t
R
t
F
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 5
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