EEWORLDEEWORLDEEWORLD

Part Number

Search

570BAC000738DG

Description
Programmable Oscillators Any, I2C Programmable XO
CategoryPassive components   
File Size550KB,37 Pages
ManufacturerSilicon Laboratories
Download Datasheet Parametric View All

570BAC000738DG Online Shopping

Suppliers Part Number Price MOQ In stock  
570BAC000738DG - - View Buy Now

570BAC000738DG Overview

Programmable Oscillators Any, I2C Programmable XO

570BAC000738DG Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerSilicon Laboratories
Product CategoryProgrammable Oscillators
Frequency10 MHz to 280 MHz
Frequency Stability61.5 PPM
Load Capacitance15 pF
Operating Supply Voltage3.3 V
Supply Voltage - Min2.97 V
Supply Voltage - Max3.63 V
Output FormatLVDS
ProductXO
Termination StyleSMD/SMT
Package / Case5 mm x 7 mm
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length7 mm
Width5 mm
Height1.65 mm
PackagingTray
Current Rating99 mA
TypeI2C Programmable
Duty Cycle - Max55 %
Mounting StyleSMD/SMT
Si 5 7 0 / S i 5 7 1
10 MH
Z TO
1.4 G H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Features
Any programmable output
frequencies from 10 to 945 MHz and
select frequencies to 1.4 GHz
I
2
C serial interface
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available LVPECL, CMOS,
LVDS, and CML outputs
Industry-standard 5x7 mm
package
Pb-free/RoHS-compliant
1.8, 2.5, or 3.3 V supply
Si5602
Applications
Ordering Information:
SONET/SDH
xDSL
10 GbE LAN/WAN
ATE
High performance
instrumentation
Low-jitter clock generation
Optical modules
Clock and data recovery
See page 32.
Pin Assignments:
See page 31.
(Top View)
SDA
7
NC
1
6
V
DD
Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-
programmable to any output frequency from 10 to 945 MHz and select frequencies
to 1400 MHz with <1 ppb resolution. The device is programmed via an I
2
C serial
interface. Unlike traditional XO/VCXOs where a different crystal is required for
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL
clock synthesis IC to provide any-frequency operation. This IC-based approach
allows the crystal resonator to provide exceptional frequency stability and
reliability. In addition, DSPLL clock synthesis provides superior supply noise
rejection, simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems.
OE
2
5
CLK–
GND
3
8
SCL
4
CLK+
Functional Block Diagram
V
DD
CLK-
CLK+
Si570
SDA
7
OE
Fixed
Frequency
XO
10-1400 MHz
DSPLL Clock
Synthesis
V
C
1
6
V
DD
SDA
SCL
OE
2
5
CLK–
Si571 only
ADC
GND
3
8
SCL
4
CLK+
GND
V
C
Si571
Si570/Si571
Rev. 1.5 4/14
Copyright © 2014 by Silicon Laboratories
Participate in the prize survey and win a 50-yuan JD.com electronic voucher (the first 400 winners are enough)
[font=微软雅黑][size=3] [/size][/font] [font=微软雅黑][size=3]Good news, good news, we have some benefits for you! {:1_108:}[/size][/font][font=微软雅黑][size=3] [/size][/font][font=微软雅黑][size=3]The first 400 net...
eric_wang Talking
Is there anyone familiar with VCP2 on DSP? Please help me.
I am totally confused now. I found several routines in TI community, but I can't figure it out. There is a VCP2_channel_density routine, which contains a complete process. It randomly generates a cert...
anqi90 DSP and ARM Processors
What is the instruction 0x82 (INT) of STM8?
I saw someone asked about this in other forums, but no one answered. It is placed before the interrupt entry address in the interrupt vector table.I guessed it should be a jump instruction, but after ...
031005 stm32/stm8
[Code + Video] Jiangsu University Zhixin Cup FPGA Innovation Design Competition Entry Collection
[size=4] Another round of FPGA competition has begun. You can check here to see if there is anything you can learn from. [/size] [size=4] Some people use Altera's Cyclone IV, and some people use Strat...
chenyy FPGA/CPLD
TDA16846-2_V1.3_
TDA16846-2_V1.3_:Power Management & SupplyData Sheet, Version1.3, TDA 16846TDA 16846-2TDA 16847TDA 16847-2...
feifei Test/Measurement

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2171  2785  662  2063  1488  44  57  14  42  30 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号