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AT93C56AW-10SU-2.7

Description
IC EEPROM 2K SPI 2MHZ 8SOIC
Categorystorage   
File Size442KB,23 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric View All

AT93C56AW-10SU-2.7 Overview

IC EEPROM 2K SPI 2MHZ 8SOIC

AT93C56AW-10SU-2.7 Parametric

Parameter NameAttribute value
memory typenon-volatile
memory formatEEPROM
technologyEEPROM
storage2Kb (256 x 8,128 x 16)
Clock frequency2MHz
Write cycle time - words, pages10ms
memory interfaceSPI
Voltage - Power2.7 V ~ 5.5 V
Operating temperature-40°C ~ 85°C(TA)
Installation typesurface mount
Package/casing8-SOIC (0.209", 5.30mm wide)
Supplier device packaging8-SOIC
1. Features
Low-voltage and Standard-voltage Operation
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
User-selectable Internal Organization
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
Three-wire Serial Interface
Sequential Read Operation
2 MHz Clock Rate (5V)
Self-timed Write Cycle (10 ms Max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
Automotive Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Ultra Thin mini-MAP
(MLP 2x3), 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP and 8-ball
dBGA2 Packages
Three-wire
Serial
EEPROM
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
2. Description
The AT93C56A/66A provides 2048/4096 bits of serial electrically erasable program-
mable read-only memory (EEPROM) organized as 128/256 words of 16 bits each
(when the ORG pin is connected to VCC) and 256/512 words of 8 bits each (when the
ORG pin is tied to ground). The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage operations are essential.
The AT93C56A/66A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-
lead EIAJ SOIC,
8-lead Ultra Thin mini-MAP (MLP 2x3)
, 8-lead Ultra Lead Frame Land
Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 packages.
The AT93C56A/66A is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a read instruction at DI, the address is decoded and the
data is clocked out serially on the data output pin DO. The write cycle is completely
self-timed and no separate erase cycle is required before write. The write cycle is only
enabled when the part is in the Erase/Write Enable State. When CS is brought “high”
following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of
the part.
The AT93C56A/66A is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
AT93C56A
AT93C66A
Not Recommended
for New Design.
Replaced by
AT93C56B or
AT93C66B.
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