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74VCX00MTCX_NL

Description
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
Categorylogic    logic   
File Size513KB,10 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74VCX00MTCX_NL Overview

Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs

74VCX00MTCX_NL Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Codecompli
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)30 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su2.8 ns
propagation delay (tpd)37 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)1.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74VCX00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
July 1999
Revised February 2005
74VCX00
Low Voltage Quad 2-Input NAND Gate
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX00 contains four 2-input NAND gates. This prod-
uct is designed for low voltage (1.2V to 3.6V) V
CC
applica-
tions with I/O compatibility up to 3.6V.
The VCX00 is fabricated with an advanced CMOS technol-
ogy to achieve high-speed operation while maintaining low
CMOS power dissipation.
Features
s
1.2V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
2.8 ns max for 3.0V to 3.6V V
CC
s
Power-off high impedance inputs and outputs
s
Static Drive (I
OH
/I
OL
)
r
24 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction
circuitry
s
Latchup performance exceeds JEDEC 78 conditions
s
ESD performance:
Human body model
!
2000V
Machine model
!
250V
s
Leadless Pb-Free DQFN package
Ordering Code:
Order Number
74VCX00M
74VCX00BQX
(Note 1)
74VCX00MTC
74VCX00MTCX_NL
(Note 2)
Package
Number
M14A
MLP014A
MTC14
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Note 1:
DQFN package available in Tape and Reel only.
Note 2:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS500160
www.fairchildsemi.com

74VCX00MTCX_NL Related Products

74VCX00MTCX_NL 74VCX00 74VCX00M 74VCX00BQX 74VCX00_05
Description Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
Is it Rohs certified? conform to - conform to conform to -
Maker Fairchild - Fairchild Fairchild -
Parts packaging code TSSOP - SOIC MLP -
package instruction TSSOP, TSSOP14,.25 - SOP, SOP14,.25 HVQCCN, LCC14,.1X.12,20 -
Contacts 14 - 14 14 -
Reach Compliance Code compli - compli compli -
series ALVC/VCX/A - ALVC/VCX/A ALVC/VCX/A -
JESD-30 code R-PDSO-G14 - R-PDSO-G14 R-XQCC-N14 -
JESD-609 code e3 - e3 e4 -
length 5 mm - 8.6235 mm 3 mm -
Load capacitance (CL) 30 pF - 30 pF 30 pF -
Logic integrated circuit type NAND GATE - NAND GATE NAND GATE -
MaximumI(ol) 0.024 A - 0.024 A 0.024 A -
Humidity sensitivity level 1 - 1 1 -
Number of functions 4 - 4 4 -
Number of entries 2 - 2 2 -
Number of terminals 14 - 14 14 -
Maximum operating temperature 85 °C - 85 °C 85 °C -
Minimum operating temperature -40 °C - -40 °C -40 °C -
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY UNSPECIFIED -
encapsulated code TSSOP - SOP HVQCCN -
Encapsulate equivalent code TSSOP14,.25 - SOP14,.25 LCC14,.1X.12,20 -
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE -
method of packing TAPE AND REEL - RAIL TAPE AND REEL -
Peak Reflow Temperature (Celsius) 260 - 260 260 -
power supply 3.3 V - 3.3 V 3.3 V -
Prop。Delay @ Nom-Su 2.8 ns - 2.8 ns 2.8 ns -
propagation delay (tpd) 37 ns - 37 ns 37 ns -
Certification status Not Qualified - Not Qualified Not Qualified -
Schmitt trigger NO - NO NO -
Maximum seat height 1.2 mm - 1.753 mm 0.8 mm -
Maximum supply voltage (Vsup) 3.6 V - 3.6 V 3.6 V -
Minimum supply voltage (Vsup) 1.2 V - 1.2 V 1.2 V -
Nominal supply voltage (Vsup) 1.5 V - 1.5 V 1.5 V -
surface mount YES - YES YES -
technology CMOS - CMOS CMOS -
Temperature level INDUSTRIAL - INDUSTRIAL INDUSTRIAL -
Terminal surface Matte Tin (Sn) - Matte Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) -
Terminal form GULL WING - GULL WING NO LEAD -
Terminal pitch 0.65 mm - 1.27 mm 0.5 mm -
Terminal location DUAL - DUAL QUAD -
Maximum time at peak reflow temperature NOT SPECIFIED - 30 NOT SPECIFIED -
width 4.4 mm - 3.9 mm 2.5 mm -
Base Number Matches 1 - 1 1 -
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