EEWORLDEEWORLDEEWORLD

Part Number

Search

LTC2619CGN-1#TRPBF

Description
IC DAC 14BIT R-R QUAD 16SSOP
CategoryAnalog mixed-signal IC    converter   
File Size318KB,22 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
Download Datasheet Parametric View All

LTC2619CGN-1#TRPBF Overview

IC DAC 14BIT R-R QUAD 16SSOP

LTC2619CGN-1#TRPBF Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?conform to
MakerLinear ( ADI )
Parts packaging codeSSOP
package instructionSSOP, SSOP16,.25
Contacts16
Manufacturer packaging codeGN
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum analog output voltage5.5 V
Minimum analog output voltage
Converter typeD/A CONVERTER
Enter bit codeBINARY
Input formatSERIAL
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length4.8895 mm
Maximum linear error (EL)0.0977%
Humidity sensitivity level1
Number of digits14
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3/5 V
Certification statusNot Qualified
Maximum seat height1.75 mm
Nominal settling time (tstl)9 µs
Maximum slew rate2 mA
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.899 mm
Features
n
LTC2609/LTC2619/LTC2629
Quad 16-/14-/12-Bit
Rail-to-Rail DACs with
I
2
C Interface
Description
The LTC
®
2609/LTC2619/LTC2629 are quad 16-, 14- and 12-
bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a 16-lead
SSOP package. They have built-in high performance output
buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply, volt-
age-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock
rate of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero-scale; after power-up, they stay at
zero-scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to mid-scale. The voltage outputs stay at mid-
scale until a valid write and update take place.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245. Patent pending.
n
n
n
n
n
n
n
n
n
n
n
n
Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
Guaranteed Monotonic Over Temperature
Separate Reference Inputs
27 Selectable Addresses
400kHz I
2
C™ Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 250µA per DAC at 3V
Individual Channel Power Down to 1µA (Max)
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk Between DACs (5µV)
LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero-Scale
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Mid-Scale
Tiny 16-Lead Narrow SSOP Package
applications
n
n
n
Mobile Communications
Process Control and Industrial Automation
Automatic Test Equipment and Instrumentation
Block Diagram
REFA
3
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
V
OUTA
4
V
OUTB
5
REFB
6
CONTROL
LOGIC
DAC B
DAC A
DAC D
REFLO
2
GND
1
V
CC
16
REFD
15
V
OUTD
14
1.0
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
V
OUTC
DAC C
13
REFC
12
DNL (LSB)
0.8
0.6
0.4
0.2
0
–0.2
–0.4
32-BIT SHIFT REGISTER
SCL
8
SDA
9
I
2
C
INTERFACE
ADDRESS
DECODE
LOGIC
CA0
11
CA1
10
CA2
7
2609 BD
Differential Nonlinearity
(LTC2609)
V
CC
= 5V
V
REF
= 4.096V
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
26091929fb

High output current high drive capability op amp
High output current high drive capability op amp...
wangwei20060608 RF/Wirelessly
Comparison of JMP and Minitab: Simple Regression Analysis
Last time, I saw someone compare JMP and Minitab based on the application of "basic statistical analysis", and concluded that JMP is far superior to Minitab in terms of statistical professionalism and...
wkhccie Embedded System
TI Labs
Our laboratory applied for "TI laboratory" last month, but the results have not come out yet. Does anyone know how long it will take to get the results? Thank you...
450678797 Microcontroller MCU
Arrow SoC Kit Study Notes
[i=s]This post was last edited by luweixuancl on 2014-12-13 12:15[/i]...
luweixuancl FPGA/CPLD
Pads are laid copper, but vias are disconnected
Somehow, a situation suddenly occurred. The PCB I drew before had been copper-plated. A via network was the ground. Its front and back sides were connected to the copper foil through flower holes. Eve...
ienglgge PCB Design
I'm begging for a tutorial video on sequential logic. I can't stand reading the documentation...
I always feel that I don't understand sequential logic thoroughly, it's so painful... I personally prefer to learn through videos, I will feel sleepy when reading materials{:1_101:} Dear experts passi...
你不懂我伤悲 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 746  1360  191  74  1040  16  28  4  2  21 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号