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PI74LPT16245AEX

Description
IC TXRX NON-INVERT 3.6V 48TSSOP
Categorysemiconductor    logic   
File Size346KB,6 Pages
ManufacturerDiodes
Websitehttp://www.diodes.com/
Environmental Compliance
Download Datasheet Parametric View All

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PI74LPT16245AEX Overview

IC TXRX NON-INVERT 3.6V 48TSSOP

PI74LPT16245AEX Parametric

Parameter NameAttribute value
logical typetransceiver, non-inverting
Number of components2
bits per component8
input type-
Output typeThree states
Current - output high, low24mA,24mA
Voltage - Power2.7 V ~ 3.6 V
Operating temperature-40°C ~ 85°C(TA)
Installation typesurface mount
Package/casing48-TFSOP (0.240", 6.10mm wide)
Supplier device packaging48-TSSOP
PI74LPT16245
Fast CMOS 3.3V 16-Bit
Bidirectional Transceiver
Product Features
Compatible with LCX™ and LVT™ families of products
Supports 5V Tolerant Mixed Signal Mode Operation
– Input can be 3V or 5V
– Output can be 3V or connected to 5V bus
Advanced Low Power CMOS Operation
Excellent output drive capability:
Balanced drives (24 mA sink and source)
Pin compatible with industry standard double-density pinouts
Low ground bounce outputs
Hysteresis on all inputs
Industrial operating temperature range: –40°C to +85°C
Multiple center pins and distributed Vcc/GND pins minimize
switching noise
Packaging (Pb-free & Green available):
– 48-pin 240 mil wide thin plastic TSSOP (A)
– 48-pin 300 mil wide plastic SSOP (V)
Product Description
The PI74LPT16245 is a 16-bit bidirectional transceiver designed
for asynchronous two-way communication between data buses.
The direction control input pin (xDIR) determines the direction
of data
ow through the bidirectional transceiver. The Direction
and Output Enable controls are designed to operate this device as
either two independent 8-bit transceivers or one 16-bit transceiver.
The output enable (OE) input, when HIGH, disables both A and B
ports by placing them in HIGH Z condition.
The PI74LPT16245 can be driven from either 3.3V or 5.0V
devices allowing this device to be used as a translator in a mixed
3.3/5.0V system.
Logic Block Diagram
1
DIR
2
DIR
1
OE
2
OE
1
A
0
1
B
0
1
A
1
1
B
1
1
A
2
1
B
2
1
A
3
1
B
3
1
A
4
1
B
4
1
A
5
1
B
5
1
A
6
1
B
6
1
A
7
1
B
7
2
A
0
2
B
0
2
A
1
2
B
1
2
A
2
2
B
2
2
A
3
2
B
3
2
A
4
2
B
4
2
A
5
2
B
5
2
A
6
2
B
6
2
A
7
2
B
7
08-0291
1
PS2068F
11/10/08

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