Obsolete Device
27C512A
512K (64K x 8) CMOS EPROM
FEATURES
• High speed performance
• CMOS Technology for low power consumption
- 25 mA Active current
- 30
µA
Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• High speed express programming algorithm
• Organized 64K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
- 32-pin PLCC Package
- 28-pin SOIC package
- Tape and reel
• Data Retention > 200 years
• Available for the following temperature ranges
- Commercial:
0°C to +70°C
- Industrial:
-40°C to +85°C
- Automotive:
-40°C to +125°C
PACKAGE TYPES
A7
A12
A15
NU
Vcc
A14
A13
32
31
PLCC
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
30
4
3
2
1
29
28
8
9
10
11
12
13
14
15
27C512A
7
27
26
25
24
23
22
21
A8
A9
A11
NC
OE/V
PP
A10
CE
O7
O6
16
17
18
19
DIP/SOIC
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
V
SS
O1
O2
V
SS
NU
O3
O4
O5
DESCRIPTION
The Microchip Technology Inc. 27C512A is a CMOS
512K bit electrically Programmable Read Only Memory
(EPROM). The device is organized into 64K words by
8 bits (64K bytes). Accessing individual bytes from an
address transition or from power-up (chip enable pin
going low) is accomplished in less than 90 ns. This
very high speed device allows the most sophisticated
microprocessors to run at full speed without the need
for WAIT states. CMOS design and processing
enables this part to be used in systems where reduced
power consumption and high reliability are require-
ments.
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC or SOIC packaging is available. Tape or
reel packaging is also available for PLCC or SOIC
packages.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
20
V
CC
A14
A13
A8
A9
A11
OE/V
PP
A10
CE
O7
O6
O5
O4
O3
2004 Microchip Technology Inc.
27C512A
DS11173G-page 1
27C512A
1.0
1.1
ELECTRICAL CHARACTERISTICS
Maximum Ratings*
TABLE 1-1:
Name
A0-A15
CE
OE/V
PP
O0 - O7
V
CC
V
SS
NC
NU
PIN FUNCTION TABLE
Function
Address Inputs
Chip Enable
Output Enable/Programming Voltage
Data Output
+5V Power Supply
Ground
No Connection; No Internal Connec-
tion
Not Used; No External Connection is
Allowed
V
CC
and input voltages w.r.t. V
SS
........ -0.6V to +7.25V
V
PP
voltage w.r.t. V
SS
during
programming ......................................... -0.6V to +14V
Voltage on A9 w.r.t. V
SS
...................... -0.6V to +13.5V
Output voltage w.r.t. V
SS
................-0.6V to V
CC
+1.0V
Storage temperature ..........................-65°C to +150°C
Ambient temp. with power applied .....-65°C to +125°C
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
V
CC
= +5V
±10%
Commercial:
Industrial:
Extended (Automotive):
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
Units
V
V
µA
V
V
µA
pF
pF
mA
mA
V
IN
= 0 to V
CC
I
OH
= - 400
µA
I
OL
= 2.1 mA
V
OUT
= 0V to V
CC
V
IN
= 0V; Tamb = 25°C;
f = 1 MHz
V
OUT
= 0V; Tamb = 25°C;
f = 1 MHz
V
CC
= 5.5V
f = 1 MHz;
OE/V
PP
= CE = V
IL
;
I
OUT
= 0 mA;
V
IL
= -0.1 to 0.8V;
V
IH
= 2.0 to V
CC
;
Note 1
Conditions
Parameter
Input Voltages
Input Leakage
Output Voltages
Output Leakage
Input Capacitance
Output Capacitance
Power Supply Current,
Active
Part*
all
all
all
all
all
all
C
I, E
Status
Logic "1"
Logic "0"
Symbol
V
IH
V
IL
I
LI
Min
2.0
-0.5
-10
2.4
Max
V
CC
+1
0.8
10
0.45
Logic "1"
Logic "0"
—
—
—
TTL input
TTL input
V
OH
V
OL
I
LO
C
IN
C
OUT
I
CC
I
CC
-10
—
—
—
—
10
6
12
25
35
Power Supply Current,
Standby
C
I, E
all
TTL input
I
CC
(
S
)
TLL
I
CC
(
S
)
TLL
TTL input
CMOS input I
CC
(
S
)
CMOS
—
—
—
1
2
30
mA
mA
µA
CE = Vcc±0.2V
* Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11173G-page 2
2004 Microchip Technology Inc.
27C512A
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times:
Ambient Temperature:
V
IH
= 2.4V and V
IL
= .45V;
1 TTL Load + 100 pF
10 ns
Commercial:
Industrial:
Extended (Automotive):
27C512-12
Min
—
—
—
0
0
Max
120
120
50
40
—
V
OH
= 2.0V and V
OL
= 0.8V
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
27C512-15
Units Conditions
Min
—
—
—
0
0
Max
150
150
60
45
—
ns
ns
ns
ns
ns
CE = OE/
V
PP
= V
IL
OE/V
PP
=
V
IL
CE = V
IL
27C512-90*
Parameter
Address to Output
Delay
CE to Output Delay
OE to Output Delay
OE to Output High
Impedance
Output Hold from
Address, CE or OE/
V
PP
, whichever
occurred first
Sym
Min
t
ACC
t
CE
t
OE
t
OFF
t
OH
—
—
—
0
0
Max
90
90
40
35
—
27C512-10*
Min
—
—
—
0
0
Max
100
100
40
35
—
*90/10 AC Testing Waveforms: V
IH
= 3.0V and V
IL
= 0V; V
OH
= 1.5V and V
OL
= 1.5V
Output Load: 1 TTL Load + 30 pF
FIGURE 1-1:
V
IH
Address
V
IL
V
IH
CE
V
IL
READ WAVEFORMS
Address Valid
t
CE(2)
V
IH
OE
V
IL
V
OH
V
OL
t
ACC
t
OE(2)
High Z
t
OFF(1,3)
t
OH
Valid Output
High Z
Outputs
O0 - O7
Notes: (1) t
OFF
is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
(3) This parameter is sampled and is not 100% tested.
CE
2004 Microchip Technology Inc.
DS11173G-page 3
27C512A
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25°C
±
5°C
V
CC
= 6.5V
±
0.25V, OE/V
PP
= V
H
= 13.0V
±
0.25V
Parameter
Input Voltages
Input Leakage
Output Voltages
V
CC
Current, program & verify
OE/V
PP
Current, program
A9 Product Identification
Status
Logic “1”
Logic “0”
—
Logic “1”
Logic “0”
—
—
—
Symbol
V
IH
V
IL
I
LI
V
OH
V
OL
I
CC2
I
PP2
V
ID
Min.
2.0
-0.1
-10
2.4
—
—
—
11.5
Max.
V
CC
+1
0.8
10
0.45
35
25
12.5
Units
V
V
µA
V
V
mA
mA
V
V
IN
= 0V to V
CC
I
OH
= -400
µA
I
OL
= 2.1 mA
CE = V
IL
Conditions (See Note 1)
Note 1: V
CC
must be applied simultaneously or before V
PP
voltage on OE/V
PP
and removed simultaneously or after
the V
PP
voltage on OE/V
PP
.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
AC Testing Waveform: V
IH
=2.4V and V
IL
=0.45V; V
OH
=2.0V; V
OL
=0.8V
Ambient Temperature: 25°C
±5°C
V
CC
= 6.5V
±
0.25V, OE/V
PP
= V
H
= 13.0V
±
0.25 V
Symbol
t
AS
t
DS
t
DH
t
AH
t
DF
t
VCS
t
PW
t
CES
t
OES
t
OEH
t
OR
t
PRT
Min.
2
2
2
0
0
2
95
2
2
2
2
50
Max.
—
—
—
—
130
—
105
—
—
—
—
—
Units
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
µs
ns
100
µs
typical
Remarks
for Program, Program Verify
and Program Inhibit Modes
Parameter
Address Set-Up Time
Data Set-Up Time
Data Hold Time
Address Hold Time
Float Delay (2)
V
CC
Set-Up Time
Program Pulse Width (1)
CE Set-Up Time
OE Set-Up Time
OE Hold Time
OE Recovery Time
OE /V
PP
Rise Time During Programming
Note 1: For express algorithm, initial programming width tolerance is 100
µs ±5%.
2: This parameter is only sampled and not 100% teted. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11173G-page 4
2004 Microchip Technology Inc.
27C512A
FIGURE 1-2:
PROGRAMMING WAVEFORMS (1)
Program
V
IH
Address Stable
Address
V
IL
V
IH
Data
V
IL
t
AS
Data In Stable
Verify
t
AH
Data Out Valid
t
DF
(2)
6.5 V (3)
V
CC
5.0V
V
IH
CE
V
IL
t
CES
t
DS
t
DH
t
CE
t
VCS
t
PW
(2)
t
OES
t
OEH
t
OR
13.0 V (3)
OE/V
PP
V
IL
t
PRT
Notes:
(1)
(2)
(3)
The input timing reference level is 0.8V for V
IL
and 2.0V for V
IH
.
t
DF
and t
OE
are characteristics of the device but must be accommodated by the programmer.
V
CC
= 6.5V ±0.25V, V
PP
= V
H
= 13.0V ±0.5V for express programming algorithm.
t
OPW
TABLE 1-6:
MODES
CE
V
IL
V
IL
V
IL
V
IH
V
IH
V
IL
V
IL
OE/V
PP
V
IL
V
H
V
IL
V
H
X
V
IH
V
IL
A9
X
X
X
X
X
X
V
H
O0 - O7
D
OUT
D
IN
D
OUT
High Z
High Z
High Z
Identity Code
Operation Mode
Read
Program
Program Verify
Program Inhibit
Standby
Output Disable
Identity
X = Don’t Care
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when
a)
b)
the CE pin is low to power up (enable) the chip
the OE/V
PP
pin is low to gate the data to the
output pins
For Read operations, if the addresses are stable, the
address access time (t
ACC
) is equal to the delay from
CE to output (t
CE
). Data is transferred to the output
after a delay (t
OE
) from the falling edge of OE/V
PP
.
2004 Microchip Technology Inc.
DS11173G-page 5
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