PCA9509
Level translating I
2
C-bus/SMBus repeater
Rev. 7 — 4 November 2014
Product data sheet
1. General description
The PCA9509 is a level translating I
2
C-bus/SMBus repeater that enables processor low
voltage 2-wire serial bus to interface with standard I
2
C-bus or SMBus I/O. While retaining
all the operating modes and features of the I
2
C-bus system during the level shifts, it also
permits extension of the I
2
C-bus by providing bidirectional buffering for both the data
(SDA) and the clock (SCL) lines, thus enabling the I
2
C-bus or SMBus maximum
capacitance of 400 pF on the higher voltage side. Port A allows a voltage range from
1.35 V to V
CC(B)
1.0 V and requires no external pull-up resistors due to the internal
current source. Port B allows a voltage range from 3.0 V to 5.5 V and is overvoltage
tolerant. Both port A and port B SDA and SCL pins are high-impedance when the
PCA9509 is unpowered.
For applications where Port A V
CC(A)
is less than 1.35 V or Port B V
CC(B)
is less than 3.0 V,
use drop-in replacement PCA9509A.
The bus port B drivers are compliant with SMBus I/O levels, while port A uses a current
sensing mechanism to detect the input or output LOW signal which prevents bus lock-up.
Port A uses a 1 mA current source for pull-up and a 200
pull-down driver. This results in
a LOW on the port A accommodating smaller voltage swings. The output pull-down on the
port A internal buffer LOW is set for approximately 0.2 V, while the input threshold of the
internal buffer is set about 50 mV lower than that of the output voltage LOW. When the
port A I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.
This prevents a lock-up condition from occurring. The output pull-down on the port B
drives a hard LOW and the input level is set at 0.3 of SMBus or I
2
C-bus voltage level
which enables port B to connect to any other I
2
C-bus devices or buffer.
The PCA9509 drivers are not enabled unless V
CC(A)
is above 0.8 V and V
CC(B)
is above
2.5 V. The enable (EN) pin can also be used to turn on and turn off the drivers under
system control. Caution should be observed to change only the state of the EN pin when
the bus is idle.
2. Features and benefits
Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device
Voltage level translation from port A (1.35 V to V
CC(B)
1.0 V) to port B (3.0 V to 5.5 V)
Requires no external pull-up resistors on lower voltage port A
Active HIGH repeater enable input
Open-drain inputs/outputs
Lock-up free operation
Supports arbitration and clock stretching across the repeater
Accommodates Standard-mode and Fast-mode I
2
C-bus devices and multiple masters
NXP Semiconductors
PCA9509
Level translating I
2
C-bus/SMBus repeater
Powered-off high-impedance I
2
C-bus pins
Operating supply voltage range of 1.35 V to V
CC(B)
1.0 V on port A, 3.0 V to 5.5 V on
port B
5 V tolerant port B SCL, SDA and enable pins
0 Hz to 400 kHz clock frequency
Remark:
The maximum system operating frequency may be less than 400 kHz
because of the delays added by the repeater.
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: TSSOP8, SO8, XQFN8
3. Ordering information
Table 1.
Ordering information
Topside
marking
PCA9509
9509
P9X
[1]
Package
Name
SO8
TSSOP8
XQFN8
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thin shrink small outline package; 8 leads; body width 3 mm
plastic, extremely thin quad flat package; no leads; 8 terminals;
body 1.6
1.6
0.5 mm
Version
SOT96-1
SOT505-1
SOT902-2
Type number
PCA9509D
PCA9509DP
PCA9509GM
[1]
‘X’ changes based on date code.
3.1 Ordering options
Table 2.
Ordering options
Orderable
part number
PCA9509D,112
PCA9509D,118
PCA9509DP
PCA9509GM
PCA9509DP,118
PCA9509GM,125
Package
Packing method
Minimum
order
quantity
Temperature
Type number
PCA9509D
SO8
SO8
TSSOP8
XQFN8
Standard marking *IC’s tube 2000
- DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
Reel 13” Q1/T1
*standard mark SMD
Reel 7” Q3/T4
*standard mark
2500
2500
4000
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
PCA9509
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 4 November 2014
2 of 24
NXP Semiconductors
PCA9509
Level translating I
2
C-bus/SMBus repeater
4. Functional diagram
V
CC(A)
V
CC(B)
PCA9509
V
CC(A)
1 mA
A1
V
CC(A)
1 mA
B1
A2
B2
EN
002aac125
GND
Fig 1.
Functional diagram of PCA9509
PCA9509
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 4 November 2014
3 of 24
NXP Semiconductors
PCA9509
Level translating I
2
C-bus/SMBus repeater
5. Pinning information
5.1 Pinning
V
CC(A)
A1
A2
GND
1
2
3
4
002aac126
8
7
V
CC(B)
B1
B2
EN
V
CC(A)
A1
A2
GND
1
2
8
7
V
CC(B)
B1
B2
EN
PCA9509DP
PCA9509D
3
4
002aac127
6
5
6
5
Fig 2.
Pin configuration for TSSOP8
Fig 3.
Pin configuration for SO8
Fig 4.
Pin configuration for XQFN8
5.2 Pin description
Table 3.
Symbol
V
CC(A)
A1
[1]
A2
[1]
GND
EN
B2
[1]
B1
[1]
V
CC(B)
[1]
Pin description
Pin
1
2
3
4
5
6
7
8
Description
port A power supply
port A (lower voltage side)
port A (lower voltage side)
ground (0 V)
enable input (active HIGH)
port B (SMBus/I
2
C-bus side)
port B (SMBus/I
2
C-bus side)
port B power supply
Port A and port B can be used for either SCL or SDA.
PCA9509
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 4 November 2014
4 of 24
NXP Semiconductors
PCA9509
Level translating I
2
C-bus/SMBus repeater
6. Functional description
Refer to
Figure 1 “Functional diagram of PCA9509”.
The PCA9509 enables I
2
C-bus or SMBus translation down to V
CC(A)
as low as 1.35 V
without degradation of system performance. The PCA9509 contains 2 bidirectional
open-drain buffers specifically designed to support up-translation/down-translation
between the low voltage and 3.3 V SMBus or 5 V I
2
C-bus. The port B I/Os are
over-voltage tolerant to 5.5 V even when the device is unpowered.
The PCA9509 includes a power-up circuit that keeps the output drivers turned off until
V
CC(B)
is above 2.5 V and the V
CC(A)
is above 0.8 V. V
CC(B)
and V
CC(A)
can be applied in
any sequence at power-up. After power-up and with the EN pin HIGH, a LOW level on
port A (below approximately 0.15 V) turns on the corresponding port B driver (either SDA
or SCL) and drives port B down to about 0 V. When port A rises above approximately
0.15 V, the port B pull-down driver is turned off and the external pull-up resistor pulls the
pin HIGH. When port B falls first and goes below 0.3V
CC(B)
, the port A driver is turned on
and port A pulls down to 0.2 V (typical). The port B pull-down is not enabled unless the
port A voltage goes below V
ILc
. If the port A low voltage goes below V
ILc
, the port B
pull-down driver is enabled until port A rises above approximately 0.15 V (V
ILc
), then
port B, if not externally driven LOW, continues to rise being pulled up by the external
pull-up resistor.
Remark:
Ground offset between the PCA9509 ground and the ground of devices on
port A of the PCA9509 must be avoided.
The reason for this cautionary remark is that a CMOS/NMOS open-drain capable of
sinking 3 mA of current at 0.4 V has an output resistance of 133
or less (R = E / I). Such
a driver shares enough current with the port A output pull-down of the PCA9509 to be
seen as a LOW as long as the ground offset is zero. If the ground offset is greater than
0 V, then the driver resistance must be less. Since V
ILc
can be as low as 90 mV at cold
temperatures and the low end of the current distribution, the maximum ground offset
should not exceed 50 mV.
Bus repeaters that use an output offset are not interoperable with the port A of the
PCA9509 as their output LOW levels will not be recognized by the PCA9509 as a LOW. If
the PCA9509 is placed in an application where the V
IL
of port A of the PCA9509 does not
go below its V
ILc
, it pulls port B LOW initially when port A input transitions LOW, but the
port B returns HIGH, so it does not reproduce the port A input on port B. Such applications
should be avoided.
Port B is interoperable with all I
2
C-bus slaves, masters and repeaters.
6.1 Enable
The EN pin is active HIGH and allows the user to select when the repeater is active. This
can be used to isolate a badly behaved slave on power-up until after the system power-up
reset. It should never change state during an I
2
C-bus operation because disabling during
a bus operation hangs the bus and enabling part way through a bus cycle could confuse
the I
2
C-bus parts being enabled.
The enable pin should only change state when the bus and the repeater port are in an idle
state to prevent system failures.
PCA9509
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 4 November 2014
5 of 24
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