Atmel ATA6870
Li-Ion, NiMH Battery Measuring, Charge Balancing and
Power-supply Circuit
DATASHEET
Features
●
12-bit battery-cell voltage measurement
●
Simultaneous battery cells measurement in parallel
●
Cell temperature measurement
●
Charge Balancing Capability
●
Parallel balancing of cells possible
●
Integrated power supply for MCU
●
Undervoltage detection
●
Less than 10µA standby current
●
Low cell imbalance current (< 10µA)
●
Hot plug-in capable
●
Interrupt timer for cycling MCU wake-ups
●
Cost-efficient solution due to cost-optimized 30V CMOS technology
●
Reliable communication between stacked ICs due to level shifters with current
sources and checksum monitoring of data
●
Daisy-chainable
●
Each IC monitors up to 6 battery cells
●
16 ICs (96 cells) per string
●
No limit on number of strings
●
Package QFN48 7mm
×7mm
Applications
●
Battery measurement, supply and monitoring IC for Li-ion and NiMH battery
systems in Electric (EV) and Hybrid Electrical (HEV) Vehicles
Benefits
●
Highest safety level for Li-ion battery systems in combination with Atmel
®
ATA6871
●
Cost reduction due to integrated measurement circuit and high voltage
power-supply
9116E–AUTO–07/12
1.
Description
The Atmel
®
ATA6870 is a measurement and monitoring circuit designed for Li-ion and NiMH multicell battery stacks in hybrid
electrical vehicles.
The Atmel ATA6870 monitors the battery-cell voltage and the battery-cell temperature with a 12-bit ADC.
The circuit also provides charge-balancing capability for each battery-cell.
In addition, a linear regulator is integrated to supply a microcontroller or other external components. Reliable communication
between stacked ICs is achieved by level-shifters with current sources. The Atmel ATA6870 can be connected to three, four,
five or six battery-cells. Up to 16 circuits (96 cells) can be cascaded in one string. The number of strings is not limited.
2.
Block Diagram
Figure 2-1. Block Diagram
To ATA6870
above
VDDHV
MBAT7
PD_N
DISCH6
Cell 6:
Reference
ADC
Cell Balancing
Digital
Level Shifter
Standby Control
PD_N_OUT
VDDHVP
3.3V
Voltage Regulator
POW_ENA
VDDHVM
AVDD
MBAT6
MBAT2
3.3V Internal
Voltage Regulator
Digital
Level Shifter
DVDD
BIASRES
DISCH1
MBAT1
TEMPREF
Cell 1:
Reference
ADC
Cell Balancing
Logic
Internal Biasing
TEMP2
TEMP1
NTC
NTC
TEMPVSS
Test
Cell
Temperature
Measuring
Digital
Level Shifter
Interchip
and
Microcontroller
Communication
Interface
MISO_IN
MOSI_OUT
SCK_OUT
CS_N_OUT
CLK_OUT
IRQ_IN
CS_N
SCK
MOSI
MISO
IRQ
CLK
MCU
GND AVSS DVSS SCANMODE
PWTST
DTST
VDDFUSE
MFIRST
CS_FUSE
ATST
To ATA6870
below
Atmel ATA6870 [DATASHEET]
9116E–AUTO–07/12
2
3.
Pin Configuration
Figure 3-1. Pinning QFN48, 7 mm
×7
mm
CS_N_OUT
SCK_OUT
MOSI_OUT
CLK_OUT
DISCH6
VDDHV
MBAT6
MBAT7
IRQ_IN
MISO_IN
VDDHVP
37
48
47
46
45
44
43
42
41
40
39
38
DISCH5
MBAT5
DISCH4
MBAT4
DISCH3
MBAT3
DISCH2
MBAT2
DISCH1
MBAT1
IRQ
CLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PD_N
36
35
34
33
32
VDDHVM
PD_N_OUT
POW_ENA
PWTST
BIASRES
Atmel
ATA6870
31
30
29
28
27
26
25
TEMPREF
TEMP2
TEMP1
TEMPVSS
AVSS
AVDD
ATST
SCANMODE
Table 3-1.
Pin Description
Pad Name
Function
Heatslug
DISCH5
MBAT5
DISCH4
MBAT4
DISCH3
MBAT3
DISCH2
MBAT2
DISCH1
MBAT1
IRQ
CLK
CS_N
SCK
MOSI
MISO
Output to drive external cell-balancing
transistor
Battery cell sensing line
Output to drive external cell-balancing
transistor
Battery cell sensing line
Output to drive external cell-balancing
transistor
Battery cell sensing line
Output to drive external cell-balancing
transistor
Battery cell sensing line
Output to drive external cell-balancing
transistor
Battery cell sensing line
Interrupt output for MCU/ATA6870 below
System clock
Chip select input from MCU/ATA6870 below
SPI clock input from MCU/ATA6870 below
Master Out Slave In input from MCU
Master In Slave Out output for MCU
SPI data input
SPI data output
Remark
Pad Number
Exposed Pad
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VDDFUSE
MFIRST
CS_FUSE
DVDD
MOSI
DVSS
CS_N
MISO
DTST
GND
SCK
Atmel ATA6870 [DATASHEET]
9116E–AUTO–07/12
3
Table 3-1.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Description (Continued)
Pad Name
MFIRST
DTST
SCANMODE
CS_FUSE
VDDFUSE
DVSS
DVDD
GND
ATST
AVDD
AVSS
TEMPVSS
TEMP1
TEMP2
TEMPREF
BIASRES
PWTST
POW_ENA
PD_N_OUT
VDDHVM
VDDHVP
PD_N
MISO_IN
MOSI_OUT
SCK_OUT
CS_N_OUT
CLK_OUT
IRQ_IN
VDDHV
MBAT7
DISCH6
MBAT6
Function
Select Master/Slave
Test-mode pin
Test-mode pin
Test-mode pin
Test-mode pin
Digital negative supply
Digital positive supply input (3.3V)
Ground
Test-mode pin
3.3V Regulator output
Analog negative supply
Ground for temperature measuring
Temperature measuring input 1
Temperature measuring input 2
Reference voltage for temperature measuring
Internal supply current adjustment
Test - mode pin
Power regulator enable/disable
Power down output
Power regulator output to supply e.g. an
external microcontroller
Power regulator supply voltage
Power down input
Master In Slave Out input from ATA6870 above
Master Out Slave In output for ATA6870 above
SPI clock output for input of ATA6870 above
Chip select output for input of ATA6870 above
System clock output for input of ATA6870
above
Interrupt input from ATA6870 above
Supply voltage
Battery cell sensing line
Output to drive external cell-balancing
transistor
Battery cell sensing line
Keep pin open (output)
Keep pin open (output)
Connected to AVDD
Keep pin open (output)
Connected to VSSA
Connected to VSSA
Connected to VSSA
Remark
Pad Number
Atmel ATA6870 [DATASHEET]
9116E–AUTO–07/12
4
4.
ATA6870 System Overview
The Atmel
®
ATA6870 can be stacked up to 16 times in one string. The communication with MCU is carried out on the lowest
level through an SPI bus. The data on the SPI bus is transmitted to the 15 other Atmel ATA6870s using the communication
interface implemented inside Atmel ATA6870.
Figure 4-1. Battery Management Architecture with One Battery String
Atmel
ATA6870
Atmel
ATA6870
Atmel
ATA6870
Atmel
ATA6870
MCU
Atmel ATA6870 [DATASHEET]
9116E–AUTO–07/12
5
NXP MCU
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