EEWORLDEEWORLDEEWORLD

Part Number

Search

550CC25M0000DG

Description
VCXO; DIFF/SE; SINGLE FREQ; 10-1
CategoryPassive components   
File Size458KB,15 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

550CC25M0000DG Online Shopping

Suppliers Part Number Price MOQ In stock  
550CC25M0000DG - - View Buy Now

550CC25M0000DG Overview

VCXO; DIFF/SE; SINGLE FREQ; 10-1

550CC25M0000DG Parametric

Parameter NameAttribute value
typeVCXO
frequency25MHz
Functionenable/disable
outputCMOS
Voltage - Power3.3V
frequency stability±50ppm
Absolute pulling range (APR)±150ppm
Operating temperature-40°C ~ 85°C
Current - Power (maximum)98mA
grade-
Installation typesurface mount
Package/casing6-SMD, no leads
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
Height - Installation (maximum)0.071"(1.80mm)
Current - Power (disabled) (maximum)75mA
Si550
R
EVISION
D
V
O L TAG E
- C
ONTR OLLED
C
RYSTAL
O
S C I L L A T O R
(VCXO)
10 MH
Z TO
1 . 4 G H
Z
Features
Available with any frequency from
10 to 945 MHz and select
frequencies to 1.4 GHz
3rd generation DSPLL
®
with
superior jitter performance (0.5 ps)
3x better temperature stability than
SAW-based oscillators
Excellent PSRR performance
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 10.
Applications
SONET/SDH
xDSL
10 GbE LAN/WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Pin Assignments:
See page 9.
(Top View)
V
C
1
2
3
6
5
4
V
DD
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to
provide a low-jitter clock at high frequencies. The Si550 supports any
frequency from 10 to 945 MHz and select frequencies to 1417 MHz. Unlike
traditional VCXOs, where a different crystal is required for each output
frequency, the Si550 uses one fixed crystal to provide a wide range of output
frequencies. This IC-based approach allows the crystal resonator to provide
exceptional frequency stability and reliability. In addition, DSPLL clock
synthesis provides superior supply noise rejection, simplifying the task of
generating low-jitter clocks in noisy environments typically found in
communication systems. The Si550 IC-based VCXO is factory-configurable
for a wide variety of user specifications, including frequency, supply voltage,
output format, tuning slope, and temperature stability. Specific configurations
are factory programmed at time of shipment, thereby eliminating the long
lead times associated with custom oscillators.
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
Fixed
Frequency
XO
Any-Frequency
10 MHz–1.4 GHz
DSPLL
®
Clock Synthesis
CLK+
CLK–
Vc
ADC
OE
GND
Rev. 1.2 6/18
Copyright © 2018 by Silicon Laboratories
Si550
Two 28335s are used simultaneously
The PWM ports on a 28335 board are not enough, so I want to connect another 28335. However, the clock sources of the two boards will not be synchronized. How can I synchronize the clock sources of the...
PK000 DSP and ARM Processors
Avoiding Common Logic Circuit Design Problems
[align=left][color=#000]Reprinted from: deyisupport[/color][/align] [align=left][color=#000]Engineers face a large number of [color=rgb(205, 23, 31)][url=http://www.ti.com/lsds/ti/logic/home_overview....
maylove Analogue and Mixed Signal
【R7F0C809】DIY Chapter 9--Serial Port Application
[i=s]This post was last edited by youzizhile on 2015-9-30 15:43[/i] [align=left]For embedded programmers, debugging is undoubtedly the most helpful assistant to solve problems. Problems can be solved ...
youzizhile Renesas Electronics MCUs
Could you help me look at the code for 18B20ROM search? Please explain it clearly. Thanks a lot
uchar search_rom(uchar *p) {uchar dat,i,j,k,n,value,number=1,number_temp=1,clash_number=0;bit clash_flag=0;for(n=0;n1; DQ=1;_nop_();_nop_(); DQ=0;_nop_();_nop_();_nop_();_nop_();_nop_();//5us DQ=0; //...
yuwei001 Embedded System
What compiler is used to compile UCOSII?
I am new to UCOS2 and would like to know what compiler can be used to generate machine executable code from the source code of this system?...
lianke230 Real-time operating system RTOS
Operational Amplifier Stability Analysis (EN)
[size=4]In [/size] [url=https://bbs.eeworld.com.cn/thread-72972-1-2.html]https://bbs.eeworld.com.cn/thread-72972-1-2.html[/url] [size=4]Operational amplifier qualitative analysis, the original data of...
xiaoxif Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2853  2809  2567  732  264  58  57  52  15  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号