NB3H5150MNGEVB datasheet, PDF - EEWORLD Datasheet

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NB3H5150MNGEVB: DescriptionEVAL BOARD NB3H5150MNG; CategoryDevelopment board/suite/development tools; File Size183KB，19 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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NB3H5150MNGEVB Overview

EVAL BOARD NB3H5150MNG

NB3H5150MNGEVB Parametric

Parameter Name	Attribute value
type	Timing
Function	clock generator
Embedded	-
IC/parts used	NB3H5150
Main attributes	-
What's included	plate
Auxiliary properties	GUI

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NB3H5150

2.5V / 3.3V Low Noise

Multi-Rate Clock Generator

Description

The NB3H5150 is a high performance Multi−Rate Clock generator

which simultaneously synthesizes up to four different frequencies

from a single PLL using a 25 MHz input reference. The reference

frequency can be provided by a crystal, LVCMOS/LVTTL, LVPECL,

HCSL or LVDS differential signals. The REFMODE pin will select

the reference source.

Three output banks (CLK1A/CLK1B to CLK3A/CLK3B) produce

user selectable frequencies of: 25 MHz, 33.33 MHz, 50 MHz,

100 MHz, 125 MHz, or 156.25 MHz and have ultra−low noise/jitter

performance of less than 0.3 ps.

The fourth output bank (CLK4A/CLK4B) can produce the

following integer and FRAC−N frequencies in pin−strap mode:

33.33 MHz, 66.66 MHz, 100 MHz, 106.25 MHz, 125 MHz,

133.33 MHz, 155.52 MHz, 156.25 MHz or 161.1328 MHz.

Each output block can create two single−ended in−phase LVCMOS

outputs or one differential pair of LVPECL outputs.

Each of the four output blocks is independently powered by a

separate VDDO, 2.5 V/3.3 V for LVPECL, 1.8 V/2.5 V/3.3 V for

LVCMOS.

The serial (I

C and SMBUS) interface can be used to load register

files into the NB3H5150 to program a variety of functions including

the frequencies and output levels of each output which can be

individually enabled and disabled.

Features

www.onsemi.com

MARKING

DIAGRAM*

QFN32

MN SUFFIX

CASE 485CE

NB3H

5150

AWLYYWWG

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information on page 18 of

this data sheet.

•

Flexible Input Reference − 25 MHz Crystal, Oscillator,

•

Single−Ended or Differential Clock

Four Independent User−Programmable Clock

Frequencies from 25 MHz to 250 MHz

Independently Configurable Outputs:

Up to Eight LVCMOS Single Ended outputs or,

Up to Four Differential LVPECL Outputs or any

combination of LVCMOS and LVPECL

Flexible Input/Core and Output Power Supply

Combinations:

VDD (Core) = 3.3 V

±5%

or 2.5 V

±5%

VDDO

(Outputs) = 3.3 V

±5%

or 2.5 V

±5%

1.8 V

±5%

(LVCMOS Only)

Independent Power Supply for each Output Bank

300 ps max Output Rise and Fall Times, LVPECL

1000 ps max Output Rise and Fall Times, LVCMOS

300 fs maximum RMS Phase Jitter Interger−N

(CLK1:4) 156.25 MHz

•

1 ps maximum RMS Phase Jitter FRAC−N (CLK4)

•

155.52 MHz

C / SMBus Compatible Interface

−40°C to +85°C Ambient Operating Temperature

Zero ppm Multiplication Error

Fractional Divide Ratios for Implementing Arbitrary

FEC/Inverse−FEC Ratios

For Additional Pin−strap Frequency and Output Type

Combinations, Contact ON Semiconductor Sales Office

32−Pin QFN, 5 mm x 5 mm

This is a Pb−Free Device

•

Applications

Telecom

Networking

Ethernet

SONET

Semiconductor Components Industries, LLC, 2016

March, 2016 − Rev. 3

Publication Order Number:

NB3H5150/D

NB3H5150MNGEVB Related Products

	NB3H5150MNGEVB	NB3H5150MNTXG
Description	EVAL BOARD NB3H5150MNG	IC CLOCK GENERATOR 32QFN

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