DEMO MANUAL DC1792A
LTC2756
Serial 18-Bit SoftSpan I
OUT
DAC
separate span control pins if SoftSpan operation is not
needed. Voltage input offset and gain adjustment pins
facilitate trimming of residual DC errors without impacting
the excellent temperature stability of this device.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, µModule, Linear Technology and the Linear logo are registered trademarks
and SoftSpan and QuikEval are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
Description
Demonstration circuit 1792A features the LTC2756 18-bit
SoftSpan™, I
OUT
DAC. The digital interface is a simple,
4-wire Serial Peripheral Interface (SPI) interface, aug-
mented with separate
CLEAR
and
LDAC
pins that reset
the output to zero and load the DAC code, respectively.
This device features six output ranges: 0V to 5V, 0V to
10V, ±5V, ±10V, ±2.5V, and –2.5V to 7.5V. These ranges
are programmable through the SPI interface or through
BoarD photo
RIBBON CABLE TO
DC590 CONTROLLER
ANALOG POWER SUPPLY
(NORMALLY ±15V)
DAC
OUTPUT
Figure 1. Connection Diagram
Quick start proceDure
Connect a low noise ±15V power supply to the AMPV
+
and AMPV
–
turret posts at the left side of the DC1792A
board. Connect J1 to a DC590 USB serial controller us-
ing the supplied 14-conductor ribbon cable. Connect
DC590 to a host PC with a standard USB A/B cable.
Run the evaluation software supplied with the DC590,
or download it from www.linear.com/software. The cor-
rect control panel will be loaded automatically, shown in
Figure 2. The software automatically sets the LTC2756
outputs according to the entries in the control panel. A
square wave option is available to test settling time. MSPAN
jumper should be set to 0 if software span control is desired.
Setting MSPAN high (1) causes the S2, S1, S0 pins to set
the span according to the table printed on the board, and
the corresponding span should be selected in software to
ensure that the calculated DAC code is correct.
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DEMO MANUAL DC1792A
Quick start proceDure
Additional software documentation may be available from
the Help menu item, as features may be added periodically.
V
CC
:
Select source for 5V V
CC
supply. Set to 5V for sup-
ply by onboard LTC6655 reference (recommended). Set
to REG to be supplied by regulated supply from DC590
Controller and remove the jumper to supply externally.
V
REF
:
Select source for reference. Set to 5V to use onboard
LTC6655 reference or select EXT to drive externally through
the V
REF
jumper.
CLR:
Asynchronous Clear Input. Tie to 0 to set all DAC
outputs to 0V.
LDAC:
Asynchronous DAC Load Input. Tie to 0 to update
all DACS if _CS is high.
Figure 2. Software Screenshot
RFLAG:
Reset Flag Output. Remove jumper and probe
middle pin for RFLAG status.
Analog Connections (Turret Posts)
V
OUT
:
DAC Voltage Output.
V
REF
:
DAC Reference Voltage. If the onboard LTC6655
reference is selected, the voltage may be measured at these
points. If a remote reference is selected, then an external
reference must be applied to these points.
VOSADJ:
DAC offset adjust input, use only if VOSA jumper
set to EXT. Nominal input range is ±5V, which will provide
±2048LSB of offset adjustment.
GEADJ:
Gain Adjust Pin. This voltage control pin can be
used to null gain error or to compensate for reference
errors. The gain error change expressed in LSB is the
same for any output range. Nominal range is ±5V, which
will provide ±2048LSB of gain adjustment.
Power and Ground Connections
Analog Power:
AMPV
+
, AMPV
–
, and GND turret posts
are the analog supplies for the onboard DAC amplifiers.
These should be connected to a well regulated, low noise
±15V power supply.
V
CC
:
Connection to V
CC
. See schematic and description
for V
CC
jumper.
Grounding:
Separate power and signal grounds are pro-
vided. Signal GND is the turret closest to V
OUT
, use this
for measurement ground and output return. Power GND
is between AMPV
+
and AMPV
–
turrets.
dc1792af
HARDWARE SET-UP
Jumpers
MSPAN:
Manual Span Control Pin. MSPAN is used to
configure the LTC2756 for operation in a single, fixed
output range. If MSPAN is 1 (high) it will be configured
for single span use. If MSPAN is low it will be set through
the QuikEval
™
Software. Default position is 0 (low).
S0, S1, S2:
Used to set the fixed output range if MSPAN
is 1 (high).
Table 1. MSPAN Configuration
S2
0
0
0
0
1
1
S1
0
0
1
1
0
0
S0
0
1
0
1
0
1
SPAN
0V to 5V
0V to 10V
±5V
±10V
±2.5V
–2.5V to 7.5V
GEADJ:
Gain Adjust Pin. If no adjustments are required,
select GND. Selecting EXT. connects the pin to the turret
allowing external adjustment to null gain error or com-
pensate for reference errors.
VOSADJ:
Offset Adjustment Selection for DAC. If no
offset adjustment is required, select GND. Selecting EXT
connects the offset pin to the turret allowing external
adjustment of offset.
2
DEMO MANUAL DC1792A
parts List
ITEM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
QTY
11
5
3
0
1
0
1
2
3
1
11
14
1
1
1
3
3
9
0
1
1
11
1
1
0
1
1
1
1
1
1
1
1
4
REFERENCE
C1, C2, C3, C5, C6, C11, C13, C15,
C18, C19, C20
C4, C36, C37, C40, C41
C7, C10, C21
C34(OPT.)
C31
C29, C35(OPT.)
C30
C32, C33
D1, D2, D3
J1
JP1–JP11
XJP1–XJP11
JP12
R1
R2
R3, R4, R5
R22, R25, R30
R11–R17, R23, R24
R26, R29, R31–R34(OPT.)
R27
R28
E1–E11
U1
U2
U3(OPT)
U4
U5
U6
U7
U9
U8
U10
U11
MH1–MH4
PART DESCRIPTION
CAP X7R, 10µF 10V, 20% 1206
.,
,
CAP X7R, 0.1µF 10V, 10% 0603
.,
,
CAP X7R, 0.01µF 10V, 10% 0603
.,
,
CAP 0603
.,
CAP C0G, 100pF 10V, 10% 0603
.,
,
CAP 1206
.,
CAP C0G, 100pF 10V, 10% 1206
.,
,
CAP X7R, 1µF 10V, 10% 1206
.,
,
DIODE, BAT54C, SOT23
CONNECTOR, HD2X7-079
3-PIN 0.079 SINGLE ROW HEADER
SHUNT, .079" CENTER
0.1" JUMPER SHUNT, SOLDER DOWN
RES., CHIP 88.7k, 1/16W, 1% 0603
,
RES., CHIP 10.0k, 1/16W, 1% 0603
,
RES., CHIP 4.99k, 1/16W, 1% 0603
,
RES., CHIP 1k, 1/16W, 5% 0603
,
RES., CHIP 10k, 1/16W, 5% 0603
,
RES., CHIP 0603
,
RES., CHIP 4.02k, 1/16W, 1% 0603
,
RES., CHIP 10, 1/16W, 5% 0603
,
Turret, Testpoint
IC., LTC2756ACG, SSOP28
IC., LTC6655CHMS8-5, MSOP-8
IC., SO-8
IC., 24LC025, TSSOP-8
IC., LT1761ES5-5, SOT23-5
IC., LT1964ES5-5, SOT23-5
IC., LT1012ACS8, SO-8
IC., LT1360CS8, SO-8
IC., LTC2054CS5, TSOT23-5
IC., LT1761ES5-BYP SOT23-5
,
IC., LTC6244CDD, 8-PIN 3
×
3, DD
STAND-OFF NYLON 0.25"
,
MICROCHIP 24LC025 I /ST
,
LINEAR, LT1761ES5-5#TRPBF
LINEAR, LT1964ES5-5#TRPBF
LINEAR, LT1012ACS8#TRPBF
LINEAR, LT1360CS8#TRPBF
LINEAR, LTC2054CS5#TRPBF
LINEAR, LT1761ES5-BYP#TRPBF
LINEAR, LTC6244CDD#TRPBF
KEYSTONE, 8831(SNAP ON)
VISHAY, CRCW06034K02KFEA
VISHAY, CRCW060310R0JNEA
MILL-MAX, 2308-2-00-44
LINEAR, LTC2756ACG#TRPBF
LINEAR, LTC6655CHMS8-5#TRPBF
AVX, 1206ZC101KAT
AVX, 1206ZC105KAT2A
DIODE/ZETEX, BAT54CTA
MOLEX, 87831-1420
SAMTEC, TMM103-02-L-S
SAMTEC, 2SN-BK-G
SAMTEC, JL-100-25-T
VISHAY, CRCW060388K7KFEA
NIC, NRC06F1002TRF
NIC, NRC06F4991TRF
VISHAY, CRCW06031K00JNEA
NIC, NRC06J1002TRF
AVX, 06033A101KAT2A
MANUFACTURER/PART NUMBER
TDK, C3216X5R1A106M
AVX, 0603ZC104KAT2A
AVX, 0603ZC103KAT2A
Required Circuit Components
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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