5962-9096402MXA datasheet, PDF

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5962-9096402MXA: DescriptionField Programmable Gate Array, 1200 Gates, CMOS, CPGA84, PGA-84; CategoryProgrammable logic; File Size176KB，15 Pages; ManufacturerActel; Websitehttp://www.actel.com/

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5962-9096402MXA Overview

Field Programmable Gate Array, 1200 Gates, CMOS, CPGA84, PGA-84

5962-9096402MXA Parametric

Parameter Name	Attribute value
Maker	Actel
package instruction	PGA-84
Reach Compliance Code	unknown
Is Samacsys	N
JESD-30 code	S-CPGA-P84
Equivalent number of gates	1200
Number of terminals	84
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	1200 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	PIN/PEG
Terminal location	PERPENDICULAR
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Update boilerplate. Add device types 02, 03, and 04. Add case

outline Z. Editorial changes throughout.

Boilerplate update, part of 5 year review. ksr

DATE (YR-MO-DA)

94-06-30

07-05-07

APPROVED

M. A. Frye

Robert M Heber

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Tim H Noh

CHECKED BY

Kenneth Rice

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS

AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

http://www.dscc.dla.mil

APPROVED BY

Tim H Noh

DRAWING APPROVAL DATE

92-06-17

REVISION LEVEL

MICROCIRCUIT, MEMORY, DIGITAL,

CMOS, FIELD PROGRAMMABLE GATE

ARRAY, 1200 GATES, MONOLITHIC

SILICON

SIZE

CAGE CODE

SHEET

67268

1 OF

5962-90964

5962-E308-07

DSCC FORM 2233

APR 97

2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless

a specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

herein.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.

3.2.1 Case outline(s). The case outline(s) shall be in accordance with figure 1 and 1.2.4 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

3.2.3 Truth table.

3.2.3.1 Unprogrammed devices. The truth table or test vectors for unprogrammed devices for contracts involving no altered

item drawing is not part of this drawing. When required in screening (see 4.2 herein) or quality conformance inspection group A,

B, C, D, or E (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of

the total number of logic modules shall be utilized or at least 25 percent of the total logic modules shall be utilized for any altered

item drawing pattern.

3.2.3.2 Programmed devices. The truth table or test vectors for programmed devices shall be as specified by an attached

altered item drawing.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full

case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical

tests for each subgroup are defined in table I.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

in accordance with MIL-PRF-38535, appendix A.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of

compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see

6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this

drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and

herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for

device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2

herein) involving devices acquired to this drawing is required for any change that affects this drawing.

3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-90964

SHEET

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in

microcircuit group number 42 (see MIL-PRF-38535, appendix A).

3.11 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in

a wide variety of configurations, two processing options are provided for selection in the contract, using an altered item drawing.

3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1

and table IIA. At the user's discretion, subgroups 7 and 9 may be performed after programming to verify the specific program

configuration.

3.11.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions

herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery.

4. VERIFICATION

4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with

MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan

shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in

accordance with MIL-PRF-38535, appendix A.

4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted

on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in

accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.

4.2.1 Additional criteria for device class M.

Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical

parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.

The test circuit shall be maintained by the manufacturer under document revision level control and shall be made

available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases,

and power dissipation, as applicable, in accordance with the intent specified in method 1015.

(1)

Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).

Interim and final electrical test parameters shall be as specified in table IIA herein.

4.2.2 Additional criteria for device classes Q and V.

The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the

device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under

document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with

MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall

specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in

method 1015 of MIL-STD-883.

Interim and final electrical test parameters shall be as specified in table IIA herein.

Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-

38535, appendix B.

4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in

accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups

A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).

4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with

MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device

class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for

device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections

(see 4.4.1 through 4.4.4).

STANDARD

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-90964

SHEET

5962-9096402MXA Related Products

	5962-9096402MXA	5962-9096402MXX	5962-9096401MXA	5962-9096401MXC	5962-9096401MXX	5962-9096401MZX
Description	Field Programmable Gate Array, 1200 Gates, CMOS, CPGA84, PGA-84	Field Programmable Gate Array, 1200 Gates, 295-Cell, CMOS, CPGA84, PGA-84	Field Programmable Gate Array, 1200 Gates, CMOS, CPGA84, PGA-84	Field Programmable Gate Array, 1200 Gates, CMOS, CPGA84, PGA-84	Field Programmable Gate Array, 1200 Gates, 295-Cell, CMOS, CPGA84, PGA-84	Field Programmable Gate Array, 295 CLBs, 1200 Gates, CMOS, CPGA84, CERAMIC, PGA-84
Maker	Actel	Actel	Actel	Actel	Actel	Actel
package instruction	PGA-84	PGA-84	PGA-84	PGA-84	PGA-84	CERAMIC, PGA-84
Reach Compliance Code	unknown	unknown	unknow	unknow	unknow	unknow
JESD-30 code	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84	S-CPGA-P84
Equivalent number of gates	1200	1200	1200	1200	1200	1200
Number of terminals	84	84	84	84	84	84
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
organize	1200 GATES	1200 GATES	1200 GATES	1200 GATES	1200 GATES	295 CLBS, 1200 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA	PGA	PGA	PGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Filter level	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR

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