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X4323S8

Description
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
Categoryaccessories   
File Size331KB,22 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet View All

X4323S8 Overview

1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8

®
X4323, X4325
32k, 4k x 8 Bit
Data Sheet
May 25, 2006
FN8122.1
CPU Supervisor with 32k EEPROM
FEATURES
• Selectable watchdog timer
• Low V
CC
detection and reset assertion
—Four standard reset threshold voltages
—Adjust low V
CC
reset threshold voltage using
special programming sequence
—Reset signal valid to V
CC
= 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog off
—3mA active current
• 32Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
—8 Ld SOIC
—8 Ld TSSOP
• Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X4323, X4325 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Serial EEPROM Memory in one
package. This combination lowers system cost,
reduces board space requirements, and increases
reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the RESET/RESET
signal. The user selects the interval from three preset
values. Once selected, the interval does not change,
even after cycling the power.
The device’s low V
CC
detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when V
CC
falls below the set minimum V
CC
trip
point. RESET/RESET is asserted until V
CC
returns to
proper operating level and stabilizes. Four industry
standard V
TRIP
thresholds are available, however, Inter-
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog Transition
Detector
WP
SDA
Data
Register
Command
Decode &
Control
Logic
V
CC
Threshold
Reset logic
Block Lock Control
Protect Logic
Status
Register
EEPROM Array
RESET (X4323)
RESET (X4325)
Reset &
Watchdog
Timebase
4kb
Watchdog
Timer Reset
SCL
S0
S1
V
CC
V
TRIP
+
-
Power-on and
Low Voltage
Reset
Generation
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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