LT3692EUH........................................ –40°C to 125°C
LT3692IUH......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
θ
JA
= 35°C/W
EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB
*DO NOT CONNECT
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3692EUH#PBF
LT3692EUH#TRPBF
3692
–40°C to 125°C
32-Lead (5mm
×
5mm) Plastic QFN
LT3692IUH#PBF
LT3692IUH#TRPBF
3692
–40°C to 125°C
32-Lead (5mm
×
5mm) Plastic QFN
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
elecTrical characTerisTics
PARAMETER
SHDN Voltage Threshold Ch 1/2 (Note 4)
SHDN Input Current Ch 1/2
V
IN1
Undervoltage Lockout (Note 5)
V
IN
Overvoltage Lockout Ch 1/2 (Note 6)
V
IN1
Shutdown Current
V
IN2
Shutdown Current
V
IN1
Quiescent Current
V
IN2
Quiescent Current
Feedback Voltage Ch 1/2
V
SHDN
= 0V
V
SHDN
= 0V
V
FB1/2
= 0.9V
V
FB1/2
= 0.9V
V
VC1/2
= 1V
V
SHDN
= 1.3V
CONDITIONS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
VIN1/2
= 15V unless otherwise specified. (Note 3)
MIN
l
TYP
1.32
1.5
2.8
38
6
0
MAX
1.4
5
3.1
41
10
2
5
1000
822
UNITS
V
µA
V
V
µA
µA
mA
µA
mV
1.24
2.5
36
V
FB1/2
= 0V, V
VOUT1/2
= 0V, V
IND1/2
= 0V
l
l
3
400
l
4
630
806
790
2
3692fa
For more information
www.linear.com/3692
LT3692
elecTrical characTerisTics
PARAMETER
Feedback Voltage Regulation
Feedback Voltage Offset Ch 1 to Ch 2
Feedback Bias Current Ch 1/2
T
J
Output Voltage (Note 7)
T
J
Error
Error Amp g
m
Ch 1/2
Error Amp Source Current Ch 1/2
Error Amp Sink Current Ch 1/2
Error Amp High Clamp Ch 1/2
Error Amp Switching Threshold Ch 1/2
Soft-Start Source Current Ch 1/2
Soft-Start V
OH
Ch 1/2
Soft-Start Sink Current Ch 1/2
Soft-Start V
OL
Ch 1/2
Soft-Start to Feedback Offset Ch 1/2
Soft-Start Sink Current Ch 1/2 POR
Soft-Start POR Threshold Ch 1/2
Soft-Start SW Disable Ch 1/2
CMPI Bias Current Ch 1/2
CMPO Leakage Ch 1/2
CMPI Threshold Ch 1/2
CMPI Threshold Ch 1/2 of V
FB1/2
CMPI Hysteresis Ch 1/2
CMPO Sink Current Ch 1/2
RT/SYNC Reference Current
Minimum Switching Frequency
Switching Frequency
Maximum Switching Frequency
Switching Phase Angle Ch 1 ≥ Ch 2
DIV Reference Current
CH1 DIV 2 Threshold
CH1 DIV 4 Threshold
CH1 DIV 8 Threshold
CLKOUT V
OL
CLKOUT V
OH
CLKOUT to SW1ON Delay ( t
DCLKOSW1
)
CLKOUT to SW2ON Delay ( t
DCLKOSW2
)
V
FB1/2
= 0.9V, V
DIV
= 0.5V
R
RT/SYNC
= 0V
R
RT/SYNC
= 0V
R
RT/SYNC
= 0V
I
CLKOUT
= –100µA
I
CLKOUT
= 100µA
CLKOUT Rising
CLKOUT Falling
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
VIN1/2
= 15V unless otherwise specified. (Note 3)
CONDITIONS
V
VIN1/2
= 3 to 40V, V
VC1/2
= 0.6 to 1.6V
V
VC1/2
= 1V
V
FB1/2
= 0.8V, V
VC1/2
= 1V
T
J
= 25°C, I
TJ
= 25µA, Temperature = 25°C
I
TJ
= 25µA, Temperature = 125°C
I
TJ
= 25µA, Temperature = –40°C
l
l
l
l
MIN
780
–12
0
TYP
806
0
85
250
1.23
–380
MAX
830
12
200
UNITS
mV
mV
nA
mV
V
mV
–60
350
19
22
1.7
0.75
0
400
25
28
1.9
0.9
12
2.15
1.4
160
0
400
90
115
0
70
720
90
60
300
12
110
1
2.5
185
12
0.58
1.05
1.55
0.25
2
60
30
60
450
31
34
2.1
1.05
14.5
2.4
2
200
12
600
120
150
100
200
740
94
85
400
12.7
150
1075
2.75
13.5
0.61
1.1
mV
µMho
µA
µA
V
V
µA
V
mA
mV
mV
µA
mV
mV
nA
nA
mV
%
mV
µA
µA
kHz
MHz
MHz
Deg
µA
V
V
V
V
V
ns
ns
V
VC1/2
= 1V, I
VC1/2
= ±5µA
V
FB1/2
= 0.6V, V
VC1/2
= 1V
V
FB1/2
=1V, V
VC1/2
= 1V
V
FB1/2
= 0.6V
V
FB1/2
= 0.6V
V
FB1/2
= 0.9V, V
SS1/2
= 0.05V
V
FB1/2
= 0.9V
V
FB1/2
= 0.4V, V
SS1/2
= 2V
V
FB1/2
= 0V
V
VC1/2
= 1V, V
SS1/2
= 0.4V
V
FB1/2
= 0V, V
SS1/2
= 0.12V (Note 8)
V
FB1/2
= 0V (Note 8)
V
FB1/2
= 0V (Note 8)
V
CMPI1/2
= 0.8V
V
CMP1/2
= 0.8V, V
CMPO1/2
= 25V,
V
CMPI1/2
Rising
V
CMPI1/2
Rising (Note 9)
V
CMPI1/2
V
CMPI1/2
= 0.6V, V
CMPO1/2
= 0.2V,
V
FB1/2
= 0.9V, V
RT/SYNC
= 0.5V
R
RT/SYNC
=0Ω
R
RT/SYNC
= 28k
R
RT/SYNC
=100k
l
l
l
l
9.5
1.9
0.9
120
–12
150
70
95
–100
700
86
35
200
11.3
50
925
2.25
10.5
0.51
0.9
1.45
3692fa
For more information
www.linear.com/3692
3
LT3692
elecTrical characTerisTics
PARAMETER
RT/SYNC to CLKOUT Delay ( t
DRTSYNCH
)
RT/SYNC to CLKOUT Delay ( t
DRTSYNCL
)
SYNC Frequency Range
SYNC Phase Angle Ch 1 to Ch 2
Minimum Switch On-Time Ch 1/2
Minimum Switch Off-Time Ch 1/2
Minimum Boost for 100% DC Ch 1/2 (Note 10)
IND + V
OUT
Current Ch 1/2
ILIM1/2 Reference Current
IND to V
OUT
Maximum Current Ch 1/2
V
VOUT1/2
= 0V
V
VOUT1/2
= 5V
V
FB1/2
= 0.9V, V
ILIM
= 0.4V
V
ILIM1/2
= 0V, V
VOUT
= 1V (Note 11)
V
ILIM1/2
= 0V, V
VOUT
= 5V (Note 11)
V
ILIM1/2
= 0.5V, V
VOUT
= 1V (Note 11)
V
ILIM1/2
= 0.5V, V
VOUT
= 5V (Note 11)
V
ILIM1/2
= 1.5V, V
VOUT
= 1V (Note 11)
V
ILIM1/2
= 1.5V, V
VOUT
= 5V (Note 11)
V
SW1/2
= 0V
I
SW1/2
= 500mA, V
BST1/2
= 18V
I
SW1/2
= 3A, V
BST1/2
= 18V
I
SW1/2
= 500mA, V
BST1/2
= 18V
I
SW1/2
= 3A, V
BST1/2
= 18V
I
SW1/2
= 3A, V
BST1/2
= 18V
9
40
1.75
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
VIN1/2
= 15V unless otherwise specified. (Note 3)
CONDITIONS
V
RT/SYNC
= 0V to 2V Rising Edge
V
RT/SYNC
= 2V to 0V Falling Edge
250
SYNC Frequency = 250kHz
180
180
200
1.4
1.8
1.5
0.5
10
1
1.25
1.6
1.8
3.8
3.8
12
1.8
2
2.6
2.8
4.8
4.8
1
100
300
13
55
2.0
17
70
2.5
2.2
5
5
14
2.6
2.75
3.6
3.8
5.8
5.8
5.0
MIN
TYP
300
150
2000
MAX
UNITS
ns
ns
kHz
Deg
ns
ns
V
µA
µA
µA
A
A
A
A
A
A
µA
mV
mV
mA
mA
V
l
l
l
Switch Leakage Current Ch 1/2
Switch Saturation Voltage Ch 1/2
Boost Current Ch 1/2
Minimum Boost Voltage Ch1/2 (Note 12)
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Absolute Maximum Voltage at V
IN1/2
and SHDN1/2 pins is 60V for
nonrepetitive 1 second transients and 40V for continuous operation.
Note 3:
The LT3692EUH is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3692IUH is guaranteed over the full –40°C to 125°C operating junction
temperature range.
Note 4:
The SHDN pins can be connected to V
IN
or driven by a logic-level
source with a series current limiting resistor.
Note 5:
V
IN
undervoltage lockout is defined as the voltage which the V
IN
pin must exceed for operation. The threshold guarantees that internal bias
lines are regulated and switching frequency is constant. Actual minimum
input voltage to maintain a regulated output will depend upon output
voltage and load current. See Applications Information.
Note 6:
V
IN
overvoltage lockout is defined as the voltage when exceeded
halts converter operation. See Applications Information.
Note 7:
The T
J
output voltage represents the temperature at the center
of the die while dissipating quiescent power. Due to switch power
dissipation and temperature gradients across the die, the T
J
output
voltage measurement does not guarantee that absolute maximum junction
temperature will not be exceeded.
Note 8:
An internal power on reset (POR) latch is set on the positive
transition of the SHDN1/2 pin through its threshold, thermal shutdown or
overvoltage lockout. The output of the latch activates current sources on
each SS pin which typically sink 400µA and discharge the SS capacitor.
The latch is reset when both SS pins are driven below the soft-start POR
threshold or the SHDN pin is taken below its threshold.
Note 9:
The threshold is expressed as a percentage of the feedback
reference voltage for the channel.
Note 10:
To enhance dropout operation, the output switch will be turned
off for the minimum off-time only when the voltage across the boost
capacitor drops below the minimum boost for 100% duty cycle threshold.
Note 11:
The IND to V
OUT
maximum current is defined as the value of
current flowing from the IND pin to the V
OUT
pin which resets the switch
latch when the V
C
pin is at its high clamp.
Note 12:
This is the minimum voltage across the boost capacitor needed
to guarantee full saturation of the internal power switch.
I abbreviated the program: void __irq IRQ_TIME0() { …………； …………； p=1; …………； …………； } uint8 p=0; int main(void) { …………；//These are all initializations, I omitted them, …………；//Timer initialization, set on...
Catching up with the once-in-a-century "God Stick Day", I have studied microcontrollers for such a long time and have been single for so many years, so I have to express my gratitude a little
:victory...
I saw the abbreviation of blood oxygen saturation is SPO2 in a paper, and then a senior student also wrote it as SPO2 for her graduation project. Today I wrote a paper for a course design, and it felt...
I have searched online for a long time, but I haven't found a solution. Some people say to use struct __attribute__((__packed__)) packed_struct to define the structure, but there is a compilation erro...
The Sino-US trade war has already started. Trump's series of actions have had a negative impact on the global economy, such as increasing tariffs on Chinese companies and restricting domestic compa...[Details]
In the actual project development process, hardware circuits often need to be modified, and the modified parts need to modify the driver. Thinking about the coming and going of such requirements is t...[Details]
In simple terms, high-end chips solve many complex problems, mid-range chips solve a single complex problem, and low-end chips solve a simple problem. Let's learn more about the relevant content wi...[Details]
1. Photovoltaic inverter installation process
1. Preparation before installation
Are the product accessories, installation tools and parts complete? Is the installation environmen...[Details]
LAN8720 test code arrangement 1. Modified based on two projects, namely "Experiment 55 Network Communication Experiment" of Zhengdian Atom ATK and "STSW-STM32070" routine of ST official The hardware ...[Details]
The photovoltaic inverter is the core equipment of the photovoltaic system. Its main function is to convert the direct current generated by the photovoltaic modules into alternating current that meets...[Details]
The F1 racetrack is roaring with engines, and a fierce F1 race is about to begin. I am not a fan of racing cars, and I have nothing to do with this world, but
I spent a special day here
because...[Details]
Analysts have sorted out some interesting phenomena. Let's follow the embedded editor to learn about the relevant content.
Huawei emerged as a star in the all-
flash
array sales ra...[Details]
1 Introduction Due to the special working environment of coal mine production, the production process is more dangerous and unsafe than the general industry. With the continuous increase in c...[Details]
With the development of information technology, intelligence, informatization and networking have become the development trend of modern industrial control. Since the 1980s, the rapid development...[Details]
Every era has anxiety that has nowhere to go. Let's follow the embedded editor to learn about the relevant content.
The anxiety of the post-Internet era is that if you don’t revolutionize ...[Details]
Using the WWDG of STM32F030, it is found that the MCU will not be reset under STOP, just like the sleep mode of STM8S. Paste the watchdog code: /******************************************************...[Details]
Summary of STM32 peripheral DMA usage: 1. Select DAM mode according to your needs: (1) Circular mode—DMA_Mode = DMA_Mode_Circular (2) Normal mode—DMA_Mode = DMA_Mode_Normal 2. For Chanel3 of DMA1, t...[Details]
environment: Host: XP Development environment: MDK4.23 MCU:STM32F103CBT6 illustrate: Collect AD through pins PA1 and PA2. Collect AD 10 times for each channel. #include "ad_driver.h" //Global ...[Details]
;The hardware connection circuit of the 51 single-chip microcomputer is as follows: ;P1.3 and P1.4 are each connected to a button; ;P0.0 and P0.3 are each connected to a light-emitting diode; ;P2.0~P...[Details]
ARM Technology
京公网安备 11010802033920号
EEWORLD
