DEMO MANUAL DC1839A
LTC3634
15V Dual 3A Monolithic
Step-Down Regulator Board
for DDR Power
forced continuous mode. In Burst Mode operation, which
is the preferred mode of low load current operation, the DC
supply current is typically only 1.3mA (both channels) at
no load (sleep mode), and less than 15μA in shutdown. In
Burst Mode operation or continuous mode operation, the
DC1839A is a very efficient circuit at high load currents:
over 80% for either channel. The LTC3634 is also capable
of in-phase or 180° out-of-phase operation, and to allow
its output to track an external voltage, either coincidentally
or ratiometrically. The LTC3634 comes in a 28-pin QFN or
leaded package, which each having an exposed pad on
the bottom side of the IC for better thermal performance.
All of these features make the DC1839A an ideal circuit
for powering DDR memory applications.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, μModule, Linear Technology, the Linear logo and Burst Mode are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
DESCRIPTION
Demonstration circuit 1839A is a dual output regulator
focused specifically for DDR memory power applications.
It’s built based on the LTC3634, a high voltage dual channel,
controlled on-time monolithic synchronous buck regulator.
The DC1839A has an input voltage range of 3.6V to 15V. The
output voltage of the first channel, V
DDQ
, of the DC1839A
has three fixed voltage settings; 1.5V, 1.8V, and 2.5V, and
is capable of delivering up to 3A of output current. The
second channel, V
TT
, is set to regulate to half the voltage
on the VDDQIN pin, which can be either the channel 1
output or an external reference voltage. It can source or
sink a maximum of 3A. The LTC3634 also provides a 10mA
buffered output of half VDDQIN – VTTR, which is used to
provide the reference voltage needed for DDR applications.
With the use of a timing resistor, the DC1839A can have its
operating frequency programmed from 500kHz to 4MHz,
or the DC1839A can be easily synchronized to an external
clock, due to an internal phase-locked loop. The DC1839A
V
DDQ
output can operate in either Burst Mode
®
operation or
PERFORMANCE SUMMARY
PARAMETER
Minimum Input Voltage
Maximum Input Voltage
Output Voltage V
OUT1
– V
DDQ
CONDITIONS
(T
A
= 25°C)
VALUE
3.6V
15V
V
IN
= 3.6V to 15V, I
OUT1
= 0A to 3A
1.5V ±2% (1.47V to 1.53V)
1.8V ±2% (1.764V to 1.836V)
2.5V ±2% (2.45V to 2.55V)
Typical Output Ripple V
DDQ
Output Voltage V
OUT2
– V
TT
V
IN
= 12V, I
OUT1
= 3A (20MHz BW)
V
IN
= 3.6V to 15V, I
OUT2
= 0A to ±3A
V
OUT1
= 1.5V
V
OUT1
= 1.8V
V
OUT1
= 2.5V
< 20mV
P-P
0.75V ±3% (0.7275V to 0.7725V)
0.9V ±3% (0.873V to 0.927V)
1.25V ±3% (1.2125V to 1.2875V)
< 20mV
P-P
1MHz
I
OUT1
= 1.6A
3.3V
1.25V
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Typical Output Ripple V
TT
Nominal Switching Frequencies
Burst Mode-to-CCM transition
INTV
CC
VTTR
V
IN
= 12V, I
OUT2
= ±3A (20MHz BW)
RT = 324k
Channel 1: V
IN
= 12V, V
OUT1
= 1.8V, f
SW
= 1 MHz
VDDQIN = 2.5V
1
DEMO MANUAL DC1839A
QUICK START PROCEDURE
The DC1839A is easy to set up to evaluate the performance
of the LTC3634. For a proper measurement equipment
configuration, set up the circuit according to the diagram
in Figure 1.
NOTE: When measuring the input or output voltage ripple,
care must be taken to avoid a long ground lead on the
oscilloscope probe. Measure the input or output voltage
ripple by touching the probe tip directly across the V
IN
or V
OUT
and GND terminals. See the proper scope probe
technique in Figure 2.
Please follow the procedure outlined below for proper
operation.
1. Connect the input power supply to the V
IN
and GND
terminals. Connect the loads between the V
OUT
and GND
terminals. Refer to Figure 1 for the proper measurement
equipment setup.
Before proceeding to operation, insert jumper shunts
XJP1 and XJP2 into the OFF positions of headers JP1
and JP2, shunt XJP3 into the forced continuous mode
(FCM) position of MODE header JP3, shunt XJP4 into
the 180° (out-of-phase) position of PHASE header JP4,
shunt XJP5 into the soft-start positions of TRACK/SS
header JP5, and shunt XJP6 into the V
OUT1
voltage
options of choice of header JP6: 1.2V, 1.5V, or 1.8V.
2. Apply 5V at V
IN
. Measure both V
OUT
s; they should read
0V. If desired, one can measure the shutdown supply
current at this point. The supply current should be less
than 30μA in shutdown.
3. Turn on V
OUT1
, V
DDQ
, and V
OUT2
, V
TT
, by shifting shunts
XJP1 and XJP2 from the OFF positions to the ON posi-
tions. Both output voltages should be within a tolerance
of ±1%.
4. Vary the input voltage from 3.6V to 15V, the channel 1
load current from 0 to 3A, and the channel 2 load cur-
rent from 0 to ±3A (The V
TT
channel sinks as well as
sources current. An easy way to test this capability is
shown in the test set-up diagram; connect a variable
resistor from V
IN
to V
OUT
, along with an ampmeter. The
current will be V
IN
minus V
OUT
divided by the variable
resistor value). V
DDQ
output voltage tolerance should
be within ±2%, whereas the output voltage tolerance
of V
TT
should be within ±3%.
5. Set the load current of both outputs to 3A and the input
voltage to 12V, then measure each output ripple voltage
(refer to Figure 2 for proper measurement technique);
they should each measure less than 20mVAC. Also,
observe the voltage waveform at either switch node
(pins 16 and 17 for channel 1, and 23 and 24 for chan-
nel 2) of each regulator. (Both switch node waveforms
should be rectangular in shape and 180°out-of-phase
with each other). The switching frequencies should be
between 800kHz and 1.2MHz (T = 1.25μs and 0.833μs).
6. With the board under proper operation, observe the load
regulation, efficiency, in-phase operation (by changing
jumper XJP4 to the 90° position), or Burst Mode op-
eration (by changing jumper XJP3 to the Burst Mode
position).
7. (Optional) Moving the zero ohm resistor at RV
DDQ
,
inserting it into R
DDQIN
, and applying a voltage to turret
V
DDQIN
allows channel 2 output voltage (VTTR) to be
adjusted to any desired voltage (to one-half the voltage
at VDDQIN).
When finished, insert shunts XJP1 and XJP2 to the OFF
position(s) and disconnect the power.
Warning: If the power for the demo board is carried in
long leads, the input voltage at the part could ring, which
could affect the operation of the circuit or even exceed
the maximum voltage rating of the IC. To eliminate the
ringing, a small Poscap capacitor (for instance, AVX part
number TPSY226M035R0200) is inserted on the pads
between the input power and return terminals on the bot-
tom of the demo board. The (greater) ESR of the Poscap
will dampen the (possible) ringing voltage due to the use
of long input leads. On a normal, typical PCB, with short
traces, this capacitor is not needed.
dc1839af
2
PCB Design
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