MT25QL256ABA8ESF-0SIT TR datasheet, PDF

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MT25QL256ABA8ESF-0SIT TR: DescriptionIC FLASH 256M SPI 133MHZ 16SOP2; Categorystorage; File Size1MB，97 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT25QL256ABA8ESF-0SIT TR Overview

IC FLASH 256M SPI 133MHZ 16SOP2

MT25QL256ABA8ESF-0SIT TR Parametric

Parameter Name	Attribute value
memory type	non-volatile
memory format	flash memory
technology	FLASH - NOR
storage	256Mb （32M x 8）
Clock frequency	133MHz
Write cycle time - words, pages	8ms，2.8ms
memory interface	SPI
Voltage - Power	2.7 V ~ 3.6 V
Operating temperature	-40°C ~ 85°C（TA）
Installation type	surface mount
Package/casing	16-SOIC (0.295", 7.50mm wide)
Supplier device packaging	16-SOP2

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256Mb, 3V Multiple I/O Serial Flash Memory

Features

Micron Serial NOR Flash Memory

3V, Multiple I/O, 4KB, 32KB, 64KB, Sector Erase

MT25QL256ABA

Features

• SPI-compatible serial bus interface

• Single and double transfer rate (STR/DTR)

• Clock frequency

– 133 MHz (MAX) for all protocols in STR

– 90 MHz (MAX) for all protocols in DTR

• Dual/quad I/O commands for increased through-

put up to 90 MB/s

• Supported protocols: Extended, Dual and Quad I/O

both STR and DTR

• Execute-in-place (XIP)

• PROGRAM/ERASE SUSPEND operations

• Volatile and nonvolatile configuration settings

• Software reset

• Additional reset pin for selected part numbers

• 3-byte and 4-byte address modes – enable memory

access beyond 128Mb

• Dedicated 64-byte OTP area outside main memory

– Readable and user-lockable

– Permanent lock with PROGRAM OTP command

• Erase capability

– Bulk erase

– Sector erase 64KB uniform granularity

– Subsector erase 4KB, 32KB granularity

• Erase performance: 400KB/sec (64KB sector)

• Erase performance: 80KB/sec (4KB sub-sector)

• Program performance: 2MB/sec

• Security and write protection

– Volatile and nonvolatile locking and software

write protection for each 64KB sector

– Nonvolatile configuration locking

– Password protection

– Hardware write protection: nonvolatile bits

(BP[3:0] and TB) define protected area size

– Program/erase protection during power-up

– CRC detects accidental changes to raw data

• Electronic signature

– JEDEC-standard 3-byte signature (BA19h)

– Extended device ID: two additional bytes identify

device factory options

• JESD47H-compliant

– Minimum 100,000 ERASE cycles per sector

– Data retention: 20 years (TYP)

Options

• Voltage

– 2.7–3.6V

• Density

– 256Mb

• Device stacking

– Monolithic

• Device generation

• Die revision

• Pin configuration

– RESET# and HOLD#

• Sector size

– 64KB

• Packages – JEDEC-standard, RoHS-

compliant

– 24-ball T-PBGA 05/6mm × 8mm

(5 × 5 array)

– 24-ball T-PBGA 05/6mm × 8mm

(4 × 6 array)

– 16-pin SOP2, 300 mils

(SO16W, SO16-Wide, SOIC-16)

– W-PDFN-8 6mm × 5mm

(MLP8 6mm × 5mm)

– W-PDFN-8 8mm × 6mm

(MLP8 8mm × 6mm)

• Security features

– Standard security

• Special options

– Standard

– Automotive

• Operating temperature range

– From –40°C to +85°C

– From –40°C to +105°C

– From –40°C to +125°C

Marking

256

CCMTD-1725822587-3368

mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb, 3V Multiple I/O Serial Flash Memory

Features

Contents

Important Notes and Warnings ......................................................................................................................... 8

Device Description ........................................................................................................................................... 9

Device Logic Diagram ................................................................................................................................. 10

Advanced Security Protection ..................................................................................................................... 10

Signal Assignments – Package Code: 12 ........................................................................................................... 11

Signal Assignments – Package Code: 14 ........................................................................................................... 12

Signal Assignments – Package Code: SF ........................................................................................................... 13

Signal Assignments – Package Code: W7, W9 .................................................................................................... 14

Signal Descriptions ......................................................................................................................................... 15

Package Dimensions – Package Code: 12 ......................................................................................................... 17

Package Dimensions – Package Code: 14 ......................................................................................................... 18

Package Dimensions – Package Code: SF ......................................................................................................... 19

Package Dimensions – Package Code: W7 ........................................................................................................ 20

Package Dimensions – Package Code: W9 ........................................................................................................ 21

Memory Map – 256Mb Density ....................................................................................................................... 22

Status Register ................................................................................................................................................ 23

Block Protection Settings ............................................................................................................................ 24

Flag Status Register ......................................................................................................................................... 25

Extended Address Register .............................................................................................................................. 26

Internal Configuration Register ....................................................................................................................... 27

Nonvolatile Configuration Register .................................................................................................................. 28

Volatile Configuration Register ........................................................................................................................ 30

Supported Clock Frequencies ..................................................................................................................... 31

Enhanced Volatile Configuration Register ........................................................................................................ 33

Security Registers ........................................................................................................................................... 34

Sector Protection Security Register .................................................................................................................. 35

Nonvolatile and Volatile Sector Lock Bits Security ............................................................................................ 36

Volatile Lock Bit Security Register .................................................................................................................... 36

Device ID Data ............................................................................................................................................... 37

Serial Flash Discovery Parameter Data ............................................................................................................. 38

Command Definitions .................................................................................................................................... 39

Software RESET Operations ............................................................................................................................ 45

RESET ENABLE and RESET MEMORY Commands ....................................................................................... 45

READ ID Operations ....................................................................................................................................... 46

READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 46

READ SERIAL FLASH DISCOVERY PARAMETER Operation .............................................................................. 47

READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 47

READ MEMORY Operations ............................................................................................................................ 48

4-BYTE READ MEMORY Operations ................................................................................................................ 49

READ MEMORY Operations Timings ............................................................................................................... 50

WRITE ENABLE/DISABLE Operations ............................................................................................................. 57

READ REGISTER Operations ........................................................................................................................... 58

WRITE REGISTER Operations ......................................................................................................................... 59

CLEAR FLAG STATUS REGISTER Operation ..................................................................................................... 61

PROGRAM Operations .................................................................................................................................... 62

4-BYTE PROGRAM Operations ........................................................................................................................ 63

PROGRAM Operations Timings ....................................................................................................................... 63

ERASE Operations .......................................................................................................................................... 66

SUSPEND/RESUME Operations ..................................................................................................................... 68

PROGRAM/ERASE SUSPEND Operations .................................................................................................... 68

CCMTD-1725822587-3368

mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb, 3V Multiple I/O Serial Flash Memory

Features

PROGRAM/ERASE RESUME Operations ......................................................................................................

ONE-TIME PROGRAMMABLE Operations .......................................................................................................

READ OTP ARRAY Command ......................................................................................................................

PROGRAM OTP ARRAY Command ..............................................................................................................

ADDRESS MODE Operations ..........................................................................................................................

ENTER and EXIT 4-BYTE ADDRESS MODE Command ................................................................................

DEEP POWER-DOWN Operations ...................................................................................................................

ENTER DEEP POWER-DOWN Command ....................................................................................................

RELEASE FROM DEEP POWER-DOWN Command .......................................................................................

DEEP POWER-DOWN Timings ....................................................................................................................

QUAD PROTOCOL Operations ........................................................................................................................

ENTER or RESET QUAD INPUT/OUTPUT MODE Command .......................................................................

CYCLIC REDUNDANCY CHECK Operations ....................................................................................................

State Table .....................................................................................................................................................

XIP Mode .......................................................................................................................................................

Activate and Terminate XIP Using Volatile Configuration Register .................................................................

Activate and Terminate XIP Using Nonvolatile Configuration Register ..........................................................

Confirmation Bit Settings Required to Activate or Terminate XIP ..................................................................

Terminating XIP After a Controller and Memory Reset .................................................................................

Power-Up and Power-Down ............................................................................................................................

Power-Up and Power-Down Requirements ..................................................................................................

Active, Standby, and Deep Power-Down Modes ................................................................................................

Power Loss and Interface Rescue .....................................................................................................................

Recovery ....................................................................................................................................................

Power Loss Recovery ...................................................................................................................................

Interface Rescue .........................................................................................................................................

Initial Delivery Status .....................................................................................................................................

Absolute Ratings and Operating Conditions .....................................................................................................

DC Characteristics and Operating Conditions ..................................................................................................

AC Characteristics and Operating Conditions ..................................................................................................

AC Reset Specifications ...................................................................................................................................

Program/Erase Specifications .........................................................................................................................

Revision History .............................................................................................................................................

Rev. K – 07/18 .............................................................................................................................................

Rev. J – 03/18 ..............................................................................................................................................

Rev. I – 07/17 ..............................................................................................................................................

Rev. H – 10/16 .............................................................................................................................................

Rev. G – 07/16 .............................................................................................................................................

Rev. F – 06/16 .............................................................................................................................................

Rev. E – 01/16 .............................................................................................................................................

Rev. D – 10/15 .............................................................................................................................................

Rev. C – 9/15 ...............................................................................................................................................

Rev. B – 6/15 ...............................................................................................................................................

Rev. A – 06/14 .............................................................................................................................................

CCMTD-1725822587-3368

mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

256Mb, 3V Multiple I/O Serial Flash Memory

Features

List of Figures

Figure 1: Part Number Ordering Information .................................................................................................... 2

Figure 2: Block Diagram .................................................................................................................................. 9

Figure 3: Logic Diagram ................................................................................................................................. 10

Figure 4: 24-Ball T-BGA, 5 x 5 (Balls Down) ..................................................................................................... 11

Figure 5: 24-Ball TBGA, 4 x 6 (Balls Down) ...................................................................................................... 12

Figure 6: 16-Pin, Plastic Small Outline – SO16 (Top View) ................................................................................ 13

Figure 7: 8-Pin, SOP2 or W-PDFN (Top View) ................................................................................................. 14

Figure 8: 24-Ball T-PBGA (5 x 5 ball grid array) – 6mm x 8mm .......................................................................... 17

Figure 9: 24-Ball T-PBGA (24b05) – 6mm x 8mm ............................................................................................. 18

Figure 10: 16-Pin SOP2 – 300 Mils Body Width ................................................................................................ 19

Figure 11: W-PDFN-8 (MLP8) – 6mm x 5mm .................................................................................................. 20

Figure 12: W-PDFN-8 (MLP8) – 8mm x 6mm .................................................................................................. 21

Figure 13: Memory Array Segments ................................................................................................................ 26

Figure 14: Internal Configuration Register ...................................................................................................... 27

Figure 15: Sector and Password Protection ..................................................................................................... 34

Figure 16: RESET ENABLE and RESET MEMORY Command ........................................................................... 45

Figure 17: READ ID and MULTIPLE I/O READ ID Commands ......................................................................... 46

Figure 18: READ SERIAL FLASH DISCOVERY PARAMETER Command – 5Ah ................................................... 47

Figure 19: READ – 03h/13h

........................................................................................................................... 50

Figure 20: FAST READ – 0Bh/0Ch

................................................................................................................. 50

Figure 21: DUAL OUTPUT FAST READ – 3Bh/3Ch

......................................................................................... 51

Figure 22: DUAL INPUT/OUTPUT FAST READ – BBh/BCh

............................................................................ 51

Figure 23: QUAD OUTPUT FAST READ – 6Bh/6Ch

........................................................................................ 52

Figure 24: QUAD INPUT/OUTPUT FAST READ – EBh/ECh

............................................................................ 52

Figure 25: QUAD INPUT/OUTPUT WORD READ – E7h

................................................................................. 53

Figure 26: DTR FAST READ – 0Dh/0Eh

.......................................................................................................... 54

Figure 27: DTR DUAL OUTPUT FAST READ – 3Dh

........................................................................................ 54

Figure 28: DTR DUAL INPUT/OUTPUT FAST READ – BDh

............................................................................ 55

Figure 29: DTR QUAD OUTPUT FAST READ – 6Dh

........................................................................................ 56

Figure 30: DTR QUAD INPUT/OUTPUT FAST READ – EDh

............................................................................ 56

Figure 31: WRITE ENABLE and WRITE DISABLE Timing ................................................................................. 57

Figure 32: READ REGISTER Timing ................................................................................................................ 58

Figure 33: WRITE REGISTER Timing .............................................................................................................. 60

Figure 34: CLEAR FLAG STATUS REGISTER Timing ........................................................................................ 61

Figure 35: PAGE PROGRAM Command .......................................................................................................... 63

Figure 36: DUAL INPUT FAST PROGRAM Command ...................................................................................... 64

Figure 37: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 64

Figure 38: QUAD INPUT FAST PROGRAM Command ..................................................................................... 65

Figure 39: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 65

Figure 40: SUBSECTOR and SECTOR ERASE Timing ....................................................................................... 67

Figure 41: BULK ERASE Timing ...................................................................................................................... 67

Figure 42: PROGRAM/ERASE SUSPEND and RESUME Timing ........................................................................ 69

Figure 43: READ OTP ARRAY Command Timing ............................................................................................. 70

Figure 44: PROGRAM OTP Command Timing ................................................................................................. 71

Figure 45: ENTER DEEP POWER-DOWN Timing ............................................................................................. 73

Figure 46: RELEASE FROM DEEP POWER-DOWN Timing ............................................................................... 74

Figure 47: XIP Mode Directly After Power-On .................................................................................................. 79

Figure 48: Power-Up Timing .......................................................................................................................... 82

Figure 49: AC Timing Input/Output Reference Levels ...................................................................................... 86

Figure 50: Reset AC Timing During PROGRAM and ERASE Cycle ..................................................................... 92

CCMTD-1725822587-3368

mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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