ProChip Designer
Atmel Software Suite
OVERVIEW
Description
The Atmel
®
ProChip Designer
®
v5.0.1 is a fully featured EDA software suite
incorporating state-of-the-art synthesis and simulation tools from Mentor Graphics
with the Atmel user-friendly interface and design navigator, as well as, powerful
fitter technologies. The combination of these tools enables CPLD designers to
achieve the highest possible logic utilization from the Atmel
ATF15xxAS/ASL/ASV/ASVL/BE
(1)
series CPLDs with Logic Doubling
®
features.
Through all of the software components available within ProChip, the following
features are supported:
Design Entry and Synthesis
̶
̶
̶
̶
VHDL
Verilog
CUPL
(2)
Schematic
(2)
̶
̶
̶
VHDL Functional and Timing Simulation
(3)
Verilog Functional and Timing Simulation
(3)
CUPL Functional Simulation
(2)
̶
̶
̶
ATF15xxBE:
(1)
1.8V ultra-low-power CPLD
ATF15xxAS/ASL:
5.0V standard and low-power CPLD
ATF15xxASV/ASVL: 3.0V standard and low-power CPLD
̶
JTAG ISP
Simulation
Device
Programming
1.
2.
3.
The ATF15xxBE is not recommended for new design.
Optional and requires Altium software.
Optional and requires a separate license from Mentor Graphics.
Atmel-3628D-PLD-ProChip-Designer-Software-Suite-Overview_052016
Features
ProChip Designer seamlessly integrates the following software components into one user-friendly Integrated
Development Environment (IDE) for the ATF15xx CPLDs:
ProChip Designer Software Components
Precision
®
RTL Synthesis
(Atmel-OEM version)
ModelSim
®
(Optional*)
(Atmel-OEM version)
FIT15xx
HDL Planner
ATMISP
VHDL and Verilog® synthesis supports from Mentor Graphics
®
.
VHDL and Verilog simulation supports from Mentor Graphics.
*Requires a separate Mentor Graphics license.
Fitting support for the ATF15xx CPLDs from Atmel.
VHDL and Verilog design entry and text editing supports from Atmel.
JTAG In-System programming (ISP) support from Atmel.
The following optional third-party software from Altium
®
can be installed separately and can be used independently
or in conjunction with ProChip Designer for schematic and CUPL
®
designs:
Optional Third-party Software
Protel
®
Design Explorer 99SE
(Atmel Edition)
Schematic and CUPL design entries, synthesis, and functional simulation supports
from Altium.
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ProChip Designer Software Suite [Overview]
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1.
ProChip Designer Software Suite Components and Licensing Terms
The software components within ProChip Designer are divided into two groups:
Schematic/CUPL Design Flow
VHDL/Verilog Design Flow
These two software groups, their contents, licensing terms, and ordering code are described in
Table 1-1
below.
Table 1-1.
Design Flow
ProChip Designer Contents and Licensing Terms
Software Components
ProChip Designer with HDL Planner, Atmel Fitter, and ATMISP.
Altium Design Explorer 99SE.
ProChip Designer with HDL Planner, Atmel Fitter, and ATMISP.
VHDL/Verilog
Design Flow
Mentor Graphics Precision RTL Synthesis (Atmel-OEM version).
Mentor Graphics ModelSim (Atmel-OEM version).
Note:
1.
Licensing Term
Free
Permanent License
[P/N: ATDS1500PC]
Free
2-year License
[P/N: ATDS15xxKSW1]
Contact Mentor Graphics
Schematic/CUPL
Design Flow
The Atmel software tools are supported on Microsoft
®
Windows
®
7/8/10 operating systems. The details of the
operating system supports for other vendors’ tools can be obtained from the third-party tool vendors’ websites or
documentation.
1.1
Default Installation of Software Components
By default, the installation of ProChip Designer includes the installation of the following software components:
HDL Planner
ATF15xx Fitters
ATMISP
Precision RTL Synthesis
ModelSim
Unlike ProChip Designer v4.0, the installation of Altium tools are no longer included in ProChip Designer
v5.0.1 installer.
Optionally,
Protel Design Explorer 99SE can be installed separately, and it can be used independently or
in conjunction with ProChip Designer v5.0.1 for schematic and CUPL designs.
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1.2
1.2.1
Software Component Licensing
Mentor Graphics Precision RTL Synthesis
To use Mentor Graphics Precision RTL Synthesis in ProChip Designer for VHDL or Verilog synthesis, a FLEXLM
(node locked) license file from Atmel is required. License requests can be submitted to Atmel for evaluation on-line
at the following URL:
www.atmel.com/System/BaseForm.aspx?target=tcm:26-17233
The 2-year license for Precision RTL Synthesis (Atmel OEM version) can also be purchased from an Atmel
distributor.
Table 1-2.
Mentor Graphics Precision RTL Synthesis License
Atmel Ordering Code
ATDS15xxKSW1
2-year License
Precision RTL Synthesis (Atmel OEM version)
Once a license has been purchased, instructions on how to download ProChip Designer from the Atmel website
and how to obtain the license file will be mailed..
Atmel no longer provides licenses for the Mentor Graphics ModelSim software.
Please contact Mentor Graphics for information on how to obtain the appropriate license for ModelSim if
VHDL/Verilog simulation is required.
1.2.2
Altium Protel Design Explorer 99SE
The 30-day trial version of Altium Protel Design Explorer 99SE is no longer available, and the Licensed Edition of
Altium Protel Design Explorer 99SE
must
be ordered separately.
The Atmel Licensed Edition of Altium Protel Design Explorer 99SE can be ordered from an Atmel distributor and
the Atmel.
Table 1-3.
Altium Protel Design Explorer 99SE License
Atmel Ordering Code
ATDS1500PC
Permanent License
Altium Protel Design Explorer 99SE
Once a license has been purchased, instructions on how to obtain ProChip Designer and Protel Design Explorer
99SE along with a 16-digit Access Code (permanent license) will be mailed. Users can then follow the instructions
provided to install the Licensed Edition software.
The ProChip Designer v5.0.1 software is available on the Atmel website at the following URL:
www.atmel.com/tools/PROCHIPDESIGNER.aspx
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2.
Design Flow
The ProChip Designer IDE is shown in
Figure 2-1.
The
Design Flow
chart on the right provides push-button access
to all stages of a design cycle. Feature descriptions for each design flow stage is described in
Table 2-1.
Figure 2-1.
ProChip Designer IDE
Design Flow
Menu Bar
Shortcut Bar
Project Tree
Transcript
Table 2-1.
Description of Design Flow Stages
Description
To specify new or existing design file(s). Launches the appropriate design entry tool for editing
based on the selected tool-flow.
To synthesize the design file(s) to generate the appropriate netlist file.
To fit the netlist into the target device with the user selected fitter options.
To specify new or existing testbench file(s). Launches the appropriate testbench entry tool for
editing based on the selected tool-flow.
To perform functional simulation on the design file(s).
To perform timing simulation on the output netlist generated by the fitter after fitting.
To program the target ATF15xx CPLD through JTAG-ISP.
Design Flow Stage
Source Manager
Logic Synthesis
Device Fitter
Testbench Manager
Functional Simulation
Timing Simulation
Atmel-ISP
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