W25Q256FV
3V 256M-BIT
SERIAL FLASH MEMORY WITH
DUAL/QUAD SPI & QPI
Publication Release Date: April 29, 2013
Preliminary - Revision F
W25Q256FV
Table of Contents
1.
2.
3.
GENERAL DESCRIPTIONS ........................................................................................................ 5
FEATURES ................................................................................................................................. 5
PACKAGE TYPES AND PIN CONFIGURATIONS ....................................................................... 6
3.1
3.2
3.3
3.4
3.5
3.6
4.
4.1
4.2
4.3
4.4
4.5
4.6
5.
6.
Pad Configuration WSON 8x6-mm ................................................................................... 6
Pad Description WSON 8x6-mm ...................................................................................... 6
Pin Configuration SOIC 300-mil........................................................................................ 7
Pin Description SOIC 300-mil ........................................................................................... 7
Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ............................................... 8
Ball Description TFBGA 8x6-mm ...................................................................................... 8
Chip Select (/CS) ............................................................................................................. 9
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................. 9
Write Protect (/WP) ......................................................................................................... 9
HOLD (/HOLD) ................................................................................................................ 9
Serial Clock (CLK) ........................................................................................................... 9
Reset (/RESET) ............................................................................................................... 9
PIN DESCRIPTIONS ................................................................................................................... 9
BLOCK DIAGRAM ..................................................................................................................... 10
FUNCTIONAL DESCRIPTIONS................................................................................................. 11
6.1
SPI / QPI Operations ..................................................................................................... 11
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
Standard SPI Instructions .................................................................................................... 11
Dual SPI Instructions ............................................................................................................ 11
Quad SPI Instructions .......................................................................................................... 12
QPI Instructions .................................................................................................................... 12
3-Byte / 4-Byte Address Modes ............................................................................................ 12
Hold Function ....................................................................................................................... 13
Software Reset & Hardware /RESET pin ............................................................................. 13
6.2
7.
7.1
Write Protection ............................................................................................................. 14
Status Registers ............................................................................................................ 15
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
7.1.8
Erase/Write In Progress (BUSY) –
Status Only
................................................................... 15
Write Enable Latch (WEL) –
Status Only
............................................................................. 15
Block Protect Bits (BP3, BP2, BP1, BP0) –
Volatile/Non-Volatile Writable
.......................... 16
Top/Bottom Block Protect (TB) –
Volatile/Non-Volatile Writable
.......................................... 16
Complement Protect (CMP) –
Volatile/Non-Volatile Writable
............................................... 16
Status Register Protect (SRP1, SRP0) –
Volatile/Non-Volatile Writable
.............................. 16
Erase/Program Suspend Status (SUS) –
Status Only
......................................................... 17
Security Register Lock Bits (LB3, LB2, LB1) –
Volatile/Non-Volatile OTP Writable
............. 17
STATUS AND CONFIGURATION REGISTERS ......................................................................... 15
-1-
W25Q256FV
7.1.9
7.1.10
7.1.11
7.1.12
7.1.13
7.1.14
7.1.15
7.1.16
7.1.17
7.1.18
Quad Enable (QE) –
Volatile/Non-Volatile Writable
............................................................. 17
Current Address Mode (ADS) –
Status Only
...................................................................... 18
Power-Up Address Mode (ADP) –
Non-Volatile Writable
................................................... 18
Write Protect Selection (WPS) –
Volatile/Non-Volatile Writable
......................................... 18
Output Driver Strength (DRV1, DRV0) –
Volatile/Non-Volatile Writable
............................. 19
HOLD or /RESET Pin Function (HOLD/RST) –
Volatile/Non-Volatile Writable...................
19
Reserved Bits –
Non Functional
......................................................................................... 19
W25Q256FV Status Register Memory Protection (WPS = 0, CMP = 0) ............................ 20
W25Q256FV Status Register Memory Protection (WPS = 0, CMP = 1) ............................ 21
W25Q256FV Individual Block Memory Protection (WPS=1) .............................................. 22
7.2
8.
8.1
Extended Address Register –
Volatile Writable Only
....................................................... 23
Device ID and Instruction Set Tables ............................................................................. 24
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.1.7
Manufacturer and Device Identification ................................................................................ 24
Instruction Set Table 1 (Standard/Dual/Quad SPI, 3-Byte & 4-Byte Address Mode)
(1)
INSTRUCTIONS ........................................................................................................................ 24
........ 25
(1)
(1)
Instruction Set Table 2 (Standard/Dual/Quad SPI Instructions, 3-Byte Address Mode) .... 26
Instruction Set Table 3 (Standard/Dual/Quad SPI Instructions, 4-Byte Address Mode) .... 27
Instruction Set Table 4 (QPI Instructions, 3-Byte & 4-Byte Address Mode)
Instruction Set Table 5 (QPI Instructions, 3-Byte Address Mode)
Instruction Set Table 6 (QPI Instructions, 4-Byte Address Mode)
(14)
(14)
(14)
..................... 28
.................................... 29
.................................... 29
8.2
Instruction Descriptions .................................................................................................. 31
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
8.2.10
8.2.11
8.2.12
8.2.13
8.2.14
8.2.15
8.2.16
8.2.17
8.2.18
8.2.19
8.2.20
8.2.21
Write Enable (06h) ............................................................................................................... 31
Write Enable for Volatile Status Register (50h) .................................................................... 31
Write Disable (04h) .............................................................................................................. 32
Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) .............. 32
Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) .............. 33
Read Extended Address Register (C8h) .............................................................................. 36
Write Extended Address Register (C5h) .............................................................................. 37
Enter 4-Byte Address Mode (B7h) ....................................................................................... 38
Exit 4-Byte Address Mode (E9h) .......................................................................................... 38
Read Data (03h) ................................................................................................................. 39
Read Data with 4-Byte Address (13h) ................................................................................ 40
Fast Read (0Bh) ................................................................................................................. 41
Fast Read with 4-Byte Address (0Ch) ................................................................................ 43
Fast Read Dual Output (3Bh) ............................................................................................. 44
Fast Read Dual Output with 4-Byte Address (3Ch) ............................................................ 45
Fast Read Quad Output (6Bh) ........................................................................................... 46
Fast Read Quad Output with 4-Byte Address (6Ch) .......................................................... 47
Fast Read Dual I/O (BBh) .................................................................................................. 48
Fast Read Dual I/O with 4-Byte Address (BCh) ................................................................. 50
Fast Read Quad I/O (EBh) ................................................................................................. 52
Fast Read Quad I/O with 4-Byte Address (ECh) ................................................................ 55
-2-
Publication Release Date: April 29, 2013
Preliminary - Revision F
W25Q256FV
8.2.22
8.2.23
8.2.24
8.2.25
8.2.26
8.2.27
8.2.28
8.2.29
8.2.30
8.2.31
8.2.32
8.2.33
8.2.34
8.2.35
8.2.36
8.2.37
8.2.38
8.2.39
8.2.40
8.2.41
8.2.42
8.2.43
8.2.44
8.2.45
8.2.46
8.2.47
8.2.48
8.2.49
8.2.50
8.2.51
8.2.52
8.2.53
Word Read Quad I/O (E7h)................................................................................................ 57
Octal Word Read Quad I/O (E3h) ...................................................................................... 59
Set Burst with Wrap (77h) .................................................................................................. 61
Page Program (02h) ........................................................................................................... 62
Quad Input Page Program (32h) ........................................................................................ 64
Sector Erase (20h) ............................................................................................................. 65
32KB Block Erase (52h) ..................................................................................................... 66
64KB Block Erase (D8h) .................................................................................................... 67
Chip Erase (C7h / 60h)....................................................................................................... 68
Erase / Program Suspend (75h)......................................................................................... 69
Erase / Program Resume (7Ah) ......................................................................................... 71
Power-down (B9h).............................................................................................................. 72
Release Power-down / Device ID (ABh) ............................................................................ 73
Read Manufacturer / Device ID (90h) ................................................................................ 75
Read Manufacturer / Device ID Dual I/O (92h) .................................................................. 76
Read Manufacturer / Device ID Quad I/O (94h) ................................................................. 77
Read Unique ID Number (4Bh) .......................................................................................... 78
Read JEDEC ID (9Fh) ........................................................................................................ 79
Read SFDP Register (5Ah) ................................................................................................ 80
Erase Security Registers (44h) .......................................................................................... 81
Program Security Registers (42h) ...................................................................................... 82
Read Security Registers (48h) ........................................................................................... 83
Set Read Parameters (C0h) ............................................................................................... 84
Burst Read with Wrap (0Ch) .............................................................................................. 85
Enter QPI Mode (38h) ........................................................................................................ 86
Exit QPI Mode (FFh) .......................................................................................................... 87
Individual Block/Sector Lock (36h) ..................................................................................... 88
Individual Block/Sector Unlock (39h).................................................................................. 89
Read Block/Sector Lock (3Dh) ........................................................................................... 90
Global Block/Sector Lock (7Eh) ......................................................................................... 91
Global Block/Sector Unlock (98h) ...................................................................................... 91
Enable Reset (66h) and Reset Device (99h)...................................................................... 92
9.
ELECTRICAL CHARACTERISTICS ........................................................................................... 93
9.1
Absolute Maximum Ratings (1) ...................................................................................... 93
9.2
9.3
9.4
9.5
9.6
9.7
9.8
Operating Ranges .......................................................................................................... 93
Power-up Timing and Write Inhibit Threshold ................................................................. 94
DC Electrical Characteristics .......................................................................................... 95
AC Measurement Conditions .......................................................................................... 96
AC Electrical Characteristics
(6)
....................................................................................... 97
AC Electrical Characteristics (cont’d) ............................................................................. 98
Serial Output Timing ...................................................................................................... 99
-3-
W25Q256FV
9.9
9.10
9.11
10.
10.1
10.2
10.3
10.4
11.
12.
11.1
Serial Input Timing ......................................................................................................... 99
HOLD Timing ................................................................................................................. 99
WP Timing ..................................................................................................................... 99
8-Pad WSON 8x6-mm (Package Code E) .................................................................... 100
16-Pin SOIC 300-mil (Package Code F) ....................................................................... 102
24-Ball TFBGA 8x6-mm (Package Code B, 5x5-1 Ball Array) ....................................... 103
24-Ball TFBGA 8x6-mm (Package Code C, 6x4 Ball Array) .......................................... 104
Valid Part Numbers and Top Side Marking ................................................................... 106
PACKAGE SPECIFICATIONS ................................................................................................. 100
ORDERING INFORMATION .................................................................................................... 105
REVISION HISTORY ............................................................................................................... 107
-4-
Publication Release Date: April 29, 2013
Preliminary - Revision F