74F132 Quad 2-Input NAND Schmitt Trigger
April 1988
Revised September 2000
74F132
Quad 2-Input NAND Schmitt Trigger
General Description
The F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL out-
put levels. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output
signals. In addition, they have a greater noise margin than
conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed by
level shifting circuitry and a standard FAST
output struc-
ture. The Schmitt Trigger uses positive feedback to effec-
tively speed-up slow input transitions, and provide different
input threshold voltages for positive and negative-going
transitions. This hysteresis between the positive-going and
negative-going input threshold (typically 800 mV) is deter-
mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.
Ordering Code:
Order Number
74F132SC
74F132SJ
74F132PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Function Table
Unit Loading/Fan Out
U.L.
Pin Names Description
A
n
, B
n
O
n
Inputs
Outputs
Input I
IH
/I
IL
20
µ
A/
−
0.6 mA
A
L
L
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Inputs
B
L
H
L
H
Outputs
O
H
H
H
L
HIGH/LOW Output I
OH
/I
OL
1.0/1.0
50/33.3
−
1 mA/20 mA
FAST is a registered trademark of Fairchild Semiconductor Corporation
© 2000 Fairchild Semiconductor Corporation
DS009477
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74F132
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated I
OL
(mA)
4000V
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
T
+
V
T
−
∆V
T
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCH
I
CCL
Parameter
Positive-going Threshold
Negative-going Threshold
Hysteresis (V
T
−
V
T
)
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW Voltage
Input HIGH Current
Input HIGH Current Breakdown Test
Output HIGH Leakage Current
Input Leakage Test
Output Leakage Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
Power Supply Current
−60
4.75
3.75
−0.6
−150
17.0
18.0
10% V
CC
5% V
CC
10% V
CC
2.5
2.7
0.5
5.0
7.0
50
V
µA
µA
µA
V
µA
mA
mA
mA
mA
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
+
−
Min
1.5
0.7
0.4
Typ
Max
2.0
1.1
−1.2
Units
V
V
V
V
V
V
CC
5.0
5.0
5.0
Min
Min
Conditions
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −1
mA
I
OL
=
20 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
HIGH
V
O
=
LOW
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
Propagation Delay
A
n
, B
n
to O
n
4.0
5.0
V
CC
= +5.0V
C
L
=
50 pF
Typ
Max
10.5
12.5
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
3.5
5.0
Max
12.0
13.0
ns
Units
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2
74F132
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
3
www.fairchildsemi.com
74F132
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
4
74F132 Quad 2-Input NAND Schmitt Trigger
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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