ATSAML10D15A-MFT datasheet, PDF

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ATSAML10D15A-MFT: DescriptionIC MCU 32BIT 32KB FLASH 24VQFN; Categorysemiconductor The embedded processor and controller; File Size9MB，1226 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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ATSAML10D15A-MFT Overview

IC MCU 32BIT 32KB FLASH 24VQFN

ATSAML10D15A-MFT Parametric

Parameter Name	Attribute value
core processor	ARM® Cortex®-M23
core size	32-bit
speed	32MHz
Connectivity	I²C，LINbus，SPI，UART/USART
Peripheral	Undervoltage detection/reset, DMA, POR, PWM, WDT
Number of I/Os	17
Program storage capacity	32KB（32K x 8）
Program memory type	flash memory
EEPROM capacity	2K x 8
RAM capacity	8K x 8
Voltage - Power Supply (Vcc/Vdd)	1.62 V ~ 3.63 V
data converter	A/D 5x12b，D/A 1x10b
Oscillator type	internal
Operating temperature	-40°C ~ 125°C（TA）
Package/casing	24-VFQFN Exposed Pad
Supplier device packaging	24-VQFN（4x4）

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SAM L10/L11 Family

Ultra Low-Power, 32-bit Cortex-M23 MCUs with TrustZone,

Crypto, and Enhanced PTC

Features

•

Operating Conditions:

1.62V to 3.63V, -40ºC to +125ºC, DC to 32 MHz

Core:

32 MHz (2.62 CoreMark/MHz and up to 31 DMIPS) ARM

Cortex

-M23 with:

–

•

Single-cycle hardware multiplier

Hardware divider

Nested Vector Interrupt Controller (NVIC)

Memory Protection Unit (MPU)

Stack Limit Checking

TrustZone

for ARMv8-M (optional)

System

– Power-on Reset (POR) and programmable Brown-out Detection (BOD)

– 8-channel Direct Memory Access Controller (DMAC)

– 8-channel event system for Inter-peripheral Core-independent Operation

– CRC-32 generator

Memory

– 64/32/16 KB Flash

– 16/8/4 KB SRAM

– 2 KB Data Flash Write-While-Read (WWR) section for non-volatile data storage

– 256 bytes TrustRAM with physical protection features

Clock Management

– Flexible clock distribution optimized for low power

– 32.768 kHz crystal oscillator

– 32.768 kHz ultra low-power internal RC oscillator

–

0.4 to 32 MHz crystal oscillator

16/12/8/4 MHz low-power internal RC oscillator

Ultra low-power digital Frequency-Locked Loop (DFLLULP)

48-96 MHz fractional digital Phase-Locked Loop (FDPLL96M)

One frequency meter

•

Low Power and Power Management

– Active, Idle, Standby with partial or full SRAM retention and off sleep modes:

• Active mode (< 25 μA/MHz)

• Idle mode (< 10 μA/MHz) with 1.5 μs wake-up time

2018 Microchip Technology Inc.

Datasheet

DS60001513B-page 1

SAM L10/L11 Family

Table of Contents

Features.......................................................................................................................... 1

1. Configuration Summary...........................................................................................14

2. Ordering Information................................................................................................16

3. Block Diagram......................................................................................................... 17

4. Pinouts.....................................................................................................................18

4.1.

4.2.

4.3.

4.4.

4.5.

Multiplexed Signals.................................................................................................................... 19

Oscillators Pinout....................................................................................................................... 21

Serial Wire Debug Interface Pinout............................................................................................ 21

SERCOM Configurations........................................................................................................... 22

General Purpose I/O (GPIO) Clusters........................................................................................23

5. Signal Descriptions List .......................................................................................... 24

6. Power Considerations............................................................................................. 26

6.1.

6.2.

6.3.

6.4.

6.5.

Power Supplies.......................................................................................................................... 26

Power Supply Constraints.......................................................................................................... 26

Power-On Reset and Brown-Out Detectors............................................................................... 27

Voltage Regulator.......................................................................................................................27

Typical Powering Schematic...................................................................................................... 27

7. Analog Peripherals Considerations......................................................................... 29

7.1.

7.2.

Reference Voltages.................................................................................................................... 30

Analog On Demand Feature...................................................................................................... 30

8. Device Startup......................................................................................................... 32

8.1.

8.2.

8.3.

8.4.

Clocks Startup............................................................................................................................ 32

Initial Instructions Fetching.........................................................................................................32

I/O Pins.......................................................................................................................................32

Performance Level Overview..................................................................................................... 32

9. Product Mapping..................................................................................................... 34

10. Memories.................................................................................................................36

10.1. Embedded Memories................................................................................................................. 36

10.2. NVM Rows................................................................................................................................. 38

10.3. Serial Number............................................................................................................................ 44

11. Processor and Architecture..................................................................................... 45

11.1. Cortex-M23 Processor............................................................................................................... 45

11.2. Nested Vector Interrupt Controller..............................................................................................47

11.3. High-Speed Bus System............................................................................................................ 50

2018 Microchip Technology Inc.

Datasheet

DS60001513B-page 4

SAM L10/L11 Family

11.4. SRAM Quality of Service............................................................................................................52

12. Peripherals Configuration Summary........................................................................54

13. SAM L11 Security Features.....................................................................................57

13.1.

13.2.

13.3.

13.4.

13.5.

13.6.

13.7.

13.8.

Features..................................................................................................................................... 57

ARM TrustZone Technology for ARMv8-M.................................................................................58

Crypto Acceleration.................................................................................................................... 69

True Random Number Generator (TRNG)................................................................................. 72

Secure Boot................................................................................................................................72

Secure Pin Multiplexing on SERCOM........................................................................................ 72

Data Flash ................................................................................................................................. 72

TrustRAM (TRAM)......................................................................................................................72

14. Boot ROM................................................................................................................73

14.1.

14.2.

14.3.

14.4.

Features..................................................................................................................................... 73

Block Diagram............................................................................................................................ 74

Product Dependencies............................................................................................................... 74

Functional Description................................................................................................................74

15. PAC - Peripheral Access Controller.........................................................................96

15.1.

15.2.

15.3.

15.4.

15.5.

15.6.

15.7.

Overview.................................................................................................................................... 96

Features..................................................................................................................................... 96

Block Diagram............................................................................................................................ 96

Product Dependencies............................................................................................................... 96

Functional Description................................................................................................................98

Register Summary....................................................................................................................102

Register Description................................................................................................................. 103

16. DSU - Device Service Unit.................................................................................... 127

16.1. Overview.................................................................................................................................. 127

16.2. Features................................................................................................................................... 127

16.3. Block Diagram.......................................................................................................................... 128

16.4. Signal Description.................................................................................................................... 128

16.5. Product Dependencies............................................................................................................. 128

16.6. Debug Operation...................................................................................................................... 130

16.7. Programming............................................................................................................................131

16.8. Security Enforcement............................................................................................................... 132

16.9. Device Identification................................................................................................................. 134

16.10. Functional Description..............................................................................................................135

16.11. Register Summary....................................................................................................................141

16.12. Register Description.................................................................................................................143

17. Clock System.........................................................................................................172

17.1.

17.2.

17.3.

17.4.

Clock Distribution..................................................................................................................... 172

Synchronous and Asynchronous Clocks..................................................................................173

Register Synchronization......................................................................................................... 174

Enabling a Peripheral............................................................................................................... 177

2018 Microchip Technology Inc.

Datasheet

DS60001513B-page 5

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