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EPC9006

Description
BOARD DEV FOR EPC2007 100V EGAN
CategoryDevelopment board/suite/development tools   
File Size1MB,6 Pages
ManufacturerEPC
Environmental Compliance
Download Datasheet Parametric Compare View All

EPC9006 Overview

BOARD DEV FOR EPC2007 100V EGAN

EPC9006 Parametric

Parameter NameAttribute value
typePower management
FunctionHalf H-bridge driver (external FET)
Embeddedno
IC/parts usedEPC2007
Main attributes100V, 5A maximum output GaNFET functionality
What's includedplate
Auxiliary propertiesGaNFET driver circuit uses 7V ~ 12V voltage
eGaN® FET DATASHEET
EPC2007
EPC2007 – Enhancement Mode Power Transistor
V
DSS
, 100 V
R
DS(ON)
, 30 mW
I
D
, 6 A
NEW PRODUCT
EFFICIENT POWER CONVERSION
HAL
Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment leverag-
ing the infrastructure that has been developed over the last 55 years. GaN’s exceptionally high elec-
tron mobility and low temperature coefficient allows very low R
DS(ON)
, while its lateral device structure
and majority carrier diode provide exceptionally low Q
G
and zero Q
RR
. The end result is a device that
can handle tasks where very high switching frequency, and low on-time are beneficial as well as
those where on-state losses dominate.
Maximum Ratings
V
DS
I
D
V
GS
T
J
T
STG
Drain-to-Source Voltage (Continuous)
Drain-to-Source Voltage (up to 10,000 5ms pulses at 125° C)
Continuous (T
A
= 25˚C,
θ
JA
= 40)
Pulsed (25˚C, Tpulse = 300 µs)
Gate-to-Source Voltage
Gate-to-Source Voltage
Operating Temperature
Storage Temperature
100
120
6
25
6
-5
-40 to 125
-40 to 150
V
V
A
V
˚C
EPC2007 eGaN® FETs are supplied only in
passivated die form with solder bumps
Applications
• High Speed DC-DC conversion
• Class D Audio
• Hard Switched and High Frequency Circuits
Benefits
• Ultra High Efficiency
• Ultra Low R
DS(on)
• Ultra low Q
G
• Ultra small footprint
PARAMETER
Static Characteristics
(T
J
= 25˚C unless otherwise stated)
BV
DSS
I
DSS
I
GSS
V
GS(th)
R
DS(ON)
Drain-to-Source Voltage
Drain Source Leakage
Gate-Source Forward Leakage
Gate-Source Reverse Leakage
Gate Threshold Voltage
Drain-Source On Resistance
TEST CONDITIONS
V
GS
= 0 V, I
D
= 75 µA
V
DS
= 80 V, V
GS
= 0 V
V
GS
= 5 V
V
GS
= -5 V
V
DS
= V
GS
, I
D
= 1.2 mA
V
GS
= 5 V, I
D
= 6 A
MIN
100
TYP
MAX
UNIT
V
20
0.25
0.1
0.7
1.4
24
60
2
0.5
2.5
30
µA
mA
V
Source-Drain Characteristics
(T
J
= 25˚C unless otherwise stated)
V
SD
Source-Drain Forward Voltage
I
S
= 0.5 A, V
GS
= 0 V, T = 25˚C
I
S
= 0.5 A, V
GS
= 0 V, T = 125˚C
1.77
1.82
V
All measurements were done with substrate shorted to source.
Thermal Characteristics
TYP
R
θ
JC
R
θ
JB
R
θ
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Board
Thermal Resistance, Junction to Ambient (Note 1)
6.9
32
80
˚C/W
˚C/W
˚C/W
Note 1: R
θ
JA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See http://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details.
EPC – EFFICIENT POWER CONVERSION CORPORATION |
WWW.EPC-CO.COM
| COPYRIGHT 2013 |
| PAGE 1

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Embedded no - no no no
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