ispLSI 2064A-80LTN100 datasheet, PDF

Datasheet> All Categories > semiconductor> Programmable logic IC> CPLD - complex programmable logic devices> ispLSI 2064A-80LTN100

Preview

ispLSI 2064A-80LTN100: DescriptionCPLD - Complex Programmable Logic Device USE ispMACH 4000V; Categorysemiconductor Programmable logic IC CPLD - complex programmable logic devices; File Size421KB，15 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com; Environmental Compliance

Download Datasheet Parametric Compare View All

ispLSI 2064A-80LTN100 Overview

CPLD - Complex Programmable Logic Device USE ispMACH 4000V

ispLSI 2064A-80LTN100 Parametric

Parameter Name	Attribute value
Maker	Lattice
Product Category	CPLD - Complex Programmable Logic Device
product	ispLSI 2064A
Large battery quantity	64
Number of logical array blocks - LAB	16
Maximum operating frequency	100 MHz
Propagation Delay—Max.	18.5 ns
Number of input/output terminals	64 I/O
Working power voltage	5 V
Minimum operating temperature	0 C
Maximum operating temperature	+ 70 C
Installation style	SMD/SMT
Package/box	TQFP-100
Encapsulation	Tray
high	1.4 mm
length	14 mm
storage type	EEPROM
series	ispLSI 2064/A
width	14 mm
Number of gates	2000
Working power current	175 mA
Factory packaging quantity	90
Supply voltage - max.	5.25 V
Supply voltage - min.	4.75 V
unit weight	657 mg

Preview

Download Datasheet

View All

Lead-

Free

Package

Options

Available!

ispLSI 2064/A

In-System Programmable High Density PLD

Functional Block Diagram

Input Bus

Features

• ENHANCEMENTS

— ispLSI 2064A is Fully Form and Function Compatible

to the ispLSI 2064, with Identical Timing

Specifcations and Packaging

— ispLSI 2064A is Built on an Advanced 0.35 Micron

CMOS

Technology

Output Routing Pool (ORP)

Select devices have been discontinued.

See Ordering Information section for product status.

Output Routing Pool (ORP)

Input Bus

— 2000 PLD Gates

— 64 I/O Pins, Four Dedicated Inputs

— 64 Registers

— High Speed Global Interconnect

— Wide Input Gating for Fast Counters, State

Machines, Address Decoders, etc.

— Small Logic Block Size for Random Logic

• HIGH PERFORMANCE E

CMOS

TECHNOLOGY

—

max

= 125 MHz Maximum Operating Frequency

—

= 7.5 ns Propagation Delay

— TTL Compatible Inputs and Outputs

— Electrically Erasable and Reprogrammable

— Non-Volatile

— 100% Tested at Time of Manufacture

— Unused Product Term Shutdown Saves Power

• IN-SYSTEM PROGRAMMABLE

Input Bus

GLB

Logic

Array

D Q

0139Bisp/2064

to change without notice.

LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.

Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com

— Complete Programmable Device Can Combine Glue

Logic and Structured Designs

— Enhanced Pin Locking Capability

— Three Dedicated Clock Input Pins

— Synchronous and Asynchronous Clocks

— Programmable Output Slew Rate Control to

Minimize Switching Noise

— Flexible Pin Placement

— Optimized Global Routing Pool Provides Global

Interconnectivity

— Lead-Free Package Options

• OFFERS THE EASE OF USE AND FAST SYSTEM

SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY

OF FIELD PROGRAMMABLE GATE ARRAYS

— In-System Programmable (ISP™) 5V Only

— Increased Manufacturing Yields, Reduced Time-to-

Market and Improved Product Quality

— Reprogram Soldered Devices for Faster Prototyping

The ispLSI 2064 and 2064A are High Density Program-

mable Logic Devices. The devices contain 64 Registers,

64 Universal I/O pins, four Dedicated Input pins, three

Dedicated Clock Input pins, two dedicated Global OE

input pins and a Global Routing Pool (GRP). The GRP

provides complete interconnectivity between all of these

elements. The 2064 and 2064A feature 5V in-system

programmability and in-system diagnostic capabilities.

The ispLSI 2064 and 2064A offer non-volatile

reprogrammability of the logic, as well as the intercon-

nect, to provide truly reconfigurable systems.

The basic unit of logic on these devices is the Generic

Logic Block (GLB). The GLBs are labeled A0, A1…B7

(Figure 1). There are a total of 16 GLBs in the ispLSI 2064

and 2064A devices. Each GLB is made up of four

macrocells. Each GLB has 18 inputs, a programmable

AND/OR/Exclusive OR array, and four outputs which can

be configured to be either combinatorial or registered.

Inputs to the GLB come from the GRP and dedicated

inputs. All of the GLB outputs are brought back into the

GRP so that they can be connected to the inputs of any

GLB on the device.

Description

August 2006

2064_10

Input Bus

D Q

Output Routing Pool (ORP)

• HIGH DENSITY PROGRAMMABLE LOGIC

Global Routing Pool

(GRP)

ispLSI 2064A-80LTN100 Related Products

	ispLSI 2064A-80LTN100	ispLSI 2064A-80LJ84	ispLSI 2064A-125LTN100	ispLSI 2064A-100LTN100	ispLSI 2064A-80LJN84I	ispLSI 2064A-100LJN84
Description	CPLD - Complex Programmable Logic Device USE ispMACH 4000V	CPLD - Complex Programmable Logic Device USE ispMACH 4000V	CPLD - Complex Programmable Logic Device USE ispMACH 4000V	CPLD - Complex Programmable Logic Device USE ispMACH 4000V	CPLD - Complex Programmable Logic Device USE ispMACH 4000V	CPLD - Complex Programmable Logic Device USE ispMACH 4000V
Maker	Lattice	Lattice	Lattice	Lattice	Lattice	Lattice
Product Category	CPLD - Complex Programmable Logic Device	CPLD - Complex Programmable Logic Device	CPLD - Complex Programmable Logic Device	CPLD - Complex Programmable Logic Device	CPLD - Complex Programmable Logic Device	CPLD - Complex Programmable Logic Device
product	ispLSI 2064A	ispLSI 2064A	ispLSI 2064A	ispLSI 2064A	ispLSI 2064A	ispLSI 2064A
Large battery quantity	64	64	64	64	64	64
Number of logical array blocks - LAB	16	16	16	16	16	16
Maximum operating frequency	100 MHz	100 MHz	125 MHz	111 MHz	100 MHz	111 MHz
Propagation Delay—Max.	18.5 ns	18.5 ns	10 ns	13 ns	18.5 ns	13 ns
Number of input/output terminals	64 I/O	64 I/O	64 I/O	64 I/O	64 I/O	64 I/O
Working power voltage	5 V	5 V	5 V	5 V	5 V	5 V
Minimum operating temperature	0 C	0 C	0 C	0 C	- 40 C	0 C
Maximum operating temperature	+ 70 C	+ 70 C	+ 70 C	+ 70 C	+ 85 C	+ 70 C
Installation style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Package/box	TQFP-100	PLCC-84	TQFP-100	TQFP-100	PLCC-84	PLCC-84
Encapsulation	Tray	Tube	Tray	Tray	Tube	Tube
high	1.4 mm	3.68 mm	1.4 mm	1.4 mm	3.68 mm	3.68 mm
length	14 mm	29.31 mm	14 mm	14 mm	29.31 mm	29.31 mm
storage type	EEPROM	EEPROM	EEPROM	EEPROM	EEPROM	EEPROM
series	ispLSI 2064/A	ispLSI 2064/A	ispLSI 2064/A	ispLSI 2064/A	ispLSI 2064/A	ispLSI 2064/A
width	14 mm	29.31 mm	14 mm	14 mm	29.31 mm	29.31 mm
Number of gates	2000	2000	2000	2000	2000	2000
Working power current	175 mA	175 mA	175 mA	175 mA	95 mA	175 mA
Factory packaging quantity	90	15	90	90	15	15
Supply voltage - max.	5.25 V	5.25 V	5.25 V	5.25 V	5.5 V	5.25 V
Supply voltage - min.	4.75 V	4.75 V	4.75 V	4.75 V	4.5 V	4.75 V
unit weight	657 mg	6.778 g	657 mg	657 mg	6.778 g	6.778 g

Recommended Resources

Thyristor three-tone lighting circuit

Circuit design using LED to indicate current amplitude

Electronic transformer circuit

AC electronic relay

Two-key interactive keyboard interface circuit

Triggerable sawtooth oscillator

Can I use telent instead of HyperTerminal in Windows?: When debugging u-boot and uclinux on the development board, the information outside the hyperterminal box is garbled and cannot be seen clearly. Is there a way to display all the information directly?...; tiandi8734 Embedded System

EVC installation question: I have VS2005 installed on my PC. Now I want to install EVC. During the installation, a message "encoded a critical error" appears and the installation stops automatically. I don't know why. I heard t...; 果果女 Embedded System

51 MCU C language embedded assembly uses the high 128 bytes storage area: [i=s]This post was last edited by huo_hu on 2014-4-16 12:56[/i] We know that the C52 microcontroller has 256 bytes of RAM, of which the upper 128 bytes can only be accessed using R0R1 as register indi...; huo_hu 51mcu

What to do next in power supply design: When designing a power supply, what do I do next? All too often, power supply design is something of an afterthought. You may have designed the rest of the board first, thinking that power supply deve...; qwqwqw2088 Analogue and Mixed Signal

Where can I download Win XP SP2 Checked Build?: Because I want to make a driver for XP xp2, I need a checked build of XP sp2. Where can I download it? Thanks....; luckyboy Embedded System

Write down your most sincere New Year's wishes and win 66 points: What are your wishes and expectations for EEWorld in the new year ? What do you want to say to your friends and yourself? Don't be stingy with your blessings, look forward boldly, describe your new ye...; EEWORLD社区 Talking

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components