BF1217WR
N-channel dual gate MOSFET
Rev. 2 — 20 June 2011
Product data sheet
1. Product profile
1.1 General description
Enhancement type N-channel field-effect transistor with source and substrate
interconnected. Integrated diodes between gates and source protect against excessive
input voltage surges. The BF1217WR is encapsulated in the SOT343R plastic package.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features and benefits
Excellent low frequency noise performance
Superior cross modulation performance during AGC
High forward transfer admittance
High forward transfer admittance to input capacitance ratio
1.3 Applications
Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply
voltage
digital and analog television tuners
professional communication equipment
NXP Semiconductors
BF1217WR
N-channel dual gate MOSFET
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
y
fs
C
iss(G1)
C
rss
NF
Xmod
Quick reference data
Conditions
DC
DC
T
sp
107
C
f = 100 MHz; T
j
= 25
C;
I
D
= 18 mA
f = 100 MHz
f = 400 MHz; Y
S
= Y
S(opt)
f = 800 MHz; Y
S
= Y
S(opt)
cross modulation
input level for k = 1 % at
40 dB AGC; f
w
= 50 MHz;
f
unw
= 60 MHz
[3]
[2]
[2]
[1]
Symbol Parameter
drain-source voltage
drain current
total power dissipation
forward transfer admittance
input capacitance at gate1
noise figure
Min
-
-
-
23
-
-
-
-
105
Typ
-
-
-
27
2.5
20
1.0
1.5
107
Max
6
30
180
38
-
-
-
-
-
Unit
V
mA
mW
mS
pF
fF
dB
dB
dBV
reverse transfer capacitance f = 100 MHz
T
j
[1]
[2]
[3]
junction temperature
T
sp
is the temperature at the soldering point of the source lead.
Calculated from S-parameters.
Measured in
Figure 17
test circuit.
-
-
150
C
2. Pinning information
Table 2.
Pin
1
2
3
4
Discrete pinning
Description
source
drain
gate 2
gate 1
2
1
3
4
G1
S
Simplified outline
Graphic symbol
G2
D
001aam153
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BF1217WR
-
plastic surface-mounted package; reverse pinning; 4 leads
Version
SOT343R
Type number
BF1217WR
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 June 2011
2 of 17
NXP Semiconductors
BF1217WR
N-channel dual gate MOSFET
4. Marking
Table 4.
Marking
Marking
VA%
Description
% = p : made in Hong Kong
% = t : made in Malaysia
% = w : made in China
Type number
BF1217WR
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
[1]
Parameter
drain-source voltage
drain current
gate1 current
gate2 current
total power dissipation
storage temperature
junction temperature
Conditions
DC
DC
Min
-
-
-
-
Max
6
30
10
10
180
+150
150
Unit
V
mA
mA
mA
mW
C
C
Per MOSFET
T
sp
107
C
[1]
-
65
-
T
sp
is the temperature at the soldering point of the source lead.
250
P
tot
(mW)
200
001aac193
150
100
50
0
0
50
100
150
T
sp
(˚C)
200
Fig 1.
Power derating curve
BF1217WR
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 June 2011
3 of 17
NXP Semiconductors
BF1217WR
N-channel dual gate MOSFET
6. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
Thermal characteristics
Parameter
thermal resistance from junction to solder point
Conditions
Typ
240
Unit
K/W
7. Static characteristics
Table 7.
Static characteristics
T
j
= 25
C.
Symbol
V
(BR)DSS
Parameter
drain-source breakdown voltage
Conditions
V
G1-S
= V
G2-S
= 0 V; I
D
= 10
A
Min Typ Max
6
6
6
0.5
0.5
0.3
0.4
[1]
Unit
V
V
V
V
V
V
V
mA
nA
nA
Per MOSFET; unless otherwise specified
-
-
-
-
-
-
-
-
-
-
-
10
10
1.5
1.5
1.0
1.0
24
50
20
V
(BR)G1-SS
gate1-source breakdown voltage V
G2-S
= V
DS
= 0 V; I
G1-S
= 10 mA
V
(BR)G2-SS
gate2-source breakdown voltage V
G1-S
= V
DS
= 0 V; I
G2-S
= 10 mA
V
F(S-G1)
V
F(S-G2)
V
G1-S(th)
V
G2-S(th)
I
DS
I
G1-S
I
G2-S
[1]
forward source-gate1 voltage
forward source-gate2 voltage
gate1-source threshold voltage
gate2-source threshold voltage
drain-source current
gate1 cut-off current
gate2 cut-off current
V
G2-S
= V
DS
= 0 V; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0 V; I
S-G2
= 10 mA
V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 100
A
V
DS
= 5 V; V
G1-S
= 5 V; I
D
= 100
A
V
G2-S
= 4 V; V
DS
= 5 V; R
G1
= 82 k
V
G2-S
= 0 V; V
DS
= 0 V; V
G1-S
= 5 V
V
G2-S
= 4 V; V
DS
= 0 V; V
G1-S
= 0 V
-
-
-
R
G1
connects gate1 to V
GG
= 5 V. See
Figure 17.
BF1217WR
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 June 2011
4 of 17
NXP Semiconductors
BF1217WR
N-channel dual gate MOSFET
8. Dynamic characteristics
Table 8.
Dynamic characteristics
Common source; T
amb
= 25
C; V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 18 mA.
Symbol Parameter
y
fs
C
iss(G1)
C
iss(G2)
C
oss
C
rss
G
tr
forward transfer admittance
input capacitance at gate1
input capacitance at gate2
output capacitance
reverse transfer capacitance
transducer power gain
Conditions
f = 100 MHz; T
j
= 25
C
f = 100 MHz
f = 100 MHz
f = 100 MHz
f = 100 MHz
B
S
= B
S(opt)
; B
L
= B
L(opt)
f = 200 MHz; G
S
= 2 mS; G
L
= 0.5 mS
f = 400 MHz; G
S
= 2 mS; G
L
= 1 mS
f = 800 MHz; G
S
= 3.3 mS; G
L
= 1 mS
NF
Xmod
noise figure
cross modulation
f = 400 MHz; Y
S
= Y
S(opt)
f = 800 MHz; Y
S
= Y
S(opt)
input level for k = 1 %; f
w
= 50 MHz; f
unw
= 60 MHz
at 0 dB AGC
at 10 dB AGC
at 20 dB AGC
at 40 dB AGC
[1]
[2]
Calculated from S-parameters.
Measured in
Figure 17
test circuit.
[2]
[1]
[1]
[1]
[1]
[1]
Min Typ Max Unit
23
-
-
-
-
-
-
-
-
-
90
-
-
27
2.5
1.0
0.8
20
34
30
26
1.0
1.5
38
-
-
-
-
-
-
-
-
-
mS
pF
pF
pF
fF
dB
dB
dB
dB
dB
dBV
dBV
dBV
dBV
104 -
100 -
104 -
105 107 -
BF1217WR
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 20 June 2011
5 of 17
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