MT61M256M32JE-10 N:A TR datasheet, PDF

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MT61M256M32JE-10 N:A TR: DescriptionDynamic Random Access Memory GDDR6 8G 256MX32 FBGA; Categorysemiconductor Memory IC Dynamic random access memory; File Size378KB，21 Pages; ManufacturerMicron; Websitehttp://www.micron.com/; Environmental Compliance

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MT61M256M32JE-10 N:A TR Overview

Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA

MT61M256M32JE-10 N:A TR Parametric

Parameter Name	Attribute value
Maker	Micron
Product Category	dynamic random access memory
type	SDRAM - GDDR6
Data bus width	32 bit
organize	256 M x 32
Package/box	FBGA-180
storage	8 Gbit
Supply voltage - max.	1.2875 V
Supply voltage - min.	1.2125 V
Minimum operating temperature	0 C
Maximum operating temperature	+ 95 C
series	MT61M
Encapsulation	Reel
Installation style	SMD/SMT
Factory packaging quantity	2000

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8Gb: 2 Channels x16/x8 GDDR6 SGRAM Networking

Features

GDDR6 SGRAM for Networking

MT61M256M32

2 Channels x 256 Meg x 16 I/O, 2 Channels x 512 Meg x 8 I/O

Features

•

= V

DDQ

= 1.25V ±3%

= 1.8V –3%/+6%

Data rate: 10 Gb/s, 12 Gb/s

2 separate independent channels (x16)

x16/x8 and 2-channel/pseudo channel (PC) mode

configurations set at reset

Single ended interfaces per channel for command/

address (CA) and data

Differential clock input CK_t/CK_c for CA per 2

channels

One differential clock input WCK_t/WCK_c per

channel for data (DQ, DBI_n, EDC)

Double data rate (DDR) command/address (CK)

Quad data rate (QDR) and double data rate (DDR)

data (WCK), depending on operating frequency

16n prefetch architecture with 256 bits per array

read or write access

16 internal banks

4 bank groups for

CCDL = 3

CK and 4

Programmable READ latency

Programmable WRITE latency

Write data mask function via CA bus with single and

double byte mask granularity

Data bus inversion (DBI) and CA bus inversion

(CABI)

Input/output PLL

CA bus training: CA input monitoring via DQ/

DBI_n/EDC signals

WCK2CK clock training with phase information via

EDC signals

Data read and write training via read FIFO (depth =

Read/write data transmission integrity secured by

cyclic redundancy check using half data rate CRC

Programmable CRC READ latency

Programmable CRC WRITE latency

Programmable EDC hold pattern for CDR

RDQS mode on EDC pins

Low power modes

• On‐chip temperature sensor with read‐out

• Auto precharge option for each burst access

• Auto refresh mode (32ms, 16k cycles) with per-bank

and per-2-bank refresh options

• Temperature sensor controlled self refresh rate

• Digital

RAS lockout

• On‐die termination (ODT) for all high‐speed inputs

• Pseudo open drain (POD125) compatible outputs

• ODT and output driver strength auto calibration

with external resistor ZQ pin (120Ω)

• Internal V

REF

with DFE for data inputs, with input

receiver characteristics programmable per pin

• Selectable external or internal V

REF

for CA inputs;

programmable V

REF

offsets for internal V

REF

• Vendor ID for device identification

• IEEE 1149.1 compliant boundary scan

• 180-ball BGA package

• Lead-free (RoHS-compliant) and halogen-free

packaging

• T

= 0°C to +95°C (Commercial) and –40°C to +95°C

(Industrial)

Options

• Organization

– 256 Meg × 32 (words × bits)

• FBGA package

– 180-ball (12.0mm × 14.0mm)

• Timing – maximum data rate

– 10 Gb/s

– 12 Gb/s

• Application code

• Operating temperature

– Commercial (0°C

≤

+95°C)

– Industrial (–40°C

≤

+95°C)

• Revision

Note:

Marking

256M32

-10

-12

None

1. Not all options listed can be combined to

define an offered product. Use the part

catalog search on http://www.micron.com

for available offerings.

CCMTD-1412786195-10193

gddr6_sgram_8gb_brief_networking.pdf - Rev. G 8/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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Description	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA AAT	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA -10 AAT	Dynamic Random Access Memory GDDR6 8G 256MX32 FBGA -10 AAT
Maker	Micron	Micron	Micron	Micron	Micron	Micron	Micron	Micron
Product Category	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory	dynamic random access memory
type	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6	SDRAM - GDDR6
Data bus width	32 bit	32 bit	32 bit	32 bit	32 bit	32 bit	32 bit	32 bit
organize	256 M x 32	256 M x 32	256 M x 32	256 M x 32	256 M x 32	256 M x 32	256 M x 32	256 M x 32
storage	8 Gbit	8 Gbit	8 Gbit	8 Gbit	8 Gbit	8 Gbit	8 Gbit	8 Gbit
Supply voltage - max.	1.2875 V	1.25 V	1.25 V	1.2875 V	1.2875 V	1.2875 V	1.2875 V	1.2875 V
series	MT61M	MT61M	MT61M	MT61M	MT61M	MT61M	MT61M	MT61M
Encapsulation	Reel	Tray	Tray	Reel	Tray	Tray	Reel	Tray
Installation style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Factory packaging quantity	2000	1260	1260	2000	1260	1260	2000	1260
Package/box	FBGA-180	-	-	FBGA-180	FBGA-180	FBGA-180	FBGA-180	FBGA-180
Supply voltage - min.	1.2125 V	-	-	1.2125 V	1.2125 V	1.2125 V	1.2125 V	1.2125 V
Minimum operating temperature	0 C	-	-	0 C	0 C	0 C	0 C	0 C
Maximum operating temperature	+ 95 C	-	-	+ 95 C	+ 95 C	+ 95 C	+ 95 C	+ 95 C

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