Data Sheet
FEATURES
SPI Interface, 4 Ω R
ON
, ±15 V/+12 V/±5 V,
1.8 V Logic Control, 8:1/Dual 4:1 Muxes
ADGS1408/ADGS1409
FUNCTIONAL BLOCK DIAGRAMS
ADGS1408
S1
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Supports burst mode and daisy-chain mode
Industry-standard SPI Mode 0 and SPI Mode 3 interface
compatible
Round robin mode allows switching times comparable with a
parallel interface
General-purpose digital outputs to control other devices,
such as parallel switches from Analog Devices, Inc.
4 Ω typical on resistance at 25°C
0.5 Ω typical on-resistance flatness at 25°C
0.2 Ω typical on-resistance match between channels at 25°C
V
SS
to V
DD
analog signal range
Fully specified at ±15 V, ±5 V, and +12 V
Power-up sequence of V
DD
, V
SS
, and GND before applying
V
L
and digital/analog inputs
1.8 V logic compatibility with 2.7 V ≤ V
L
≤ 3.3 V
24-lead LFCSP package
D
S8
GPO1
GPO2
GPO3
GPO4
SCLK
SPI
INTERFACE
CNV
SDO
16791-001
SDI
CS RESET/V
L
Figure 1. ADGS1408 Functional Block Diagram
ADGS1409
S1A
DA
S4A
APPLICATIONS
Automated test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communications systems
Relay replacement
S1B
DB
S4B
GPO1
GPO2
GPO3
GPO4
GPO5
SPI
INTERFACE
CNV
SDO
SCLK
SDI
CS RESET/V
L
Figure 2. ADGS1409 Functional Block Diagram
GENERAL DESCRIPTION
The ADGS1408/ADGS1409 are analog multiplexers comprising
eight single channels and four differential channels, respectively.
A serial peripheral interface (SPI) controls the switches. The SPI
interface has robust error detection features such as cyclic
redundancy check (CRC) error detection, invalid read/write
address detection, and SCLK count error detection.
It is possible to daisy-chain multiple ADGS1408/ADGS1409
devices together. Daisy-chain mode enables the configuration of
multiple devices with a minimal amount of digital lines. The
ADGS1408/ADGS1409 can also operate in burst mode to
decrease the time between SPI commands.
iCMOS
construction ensures ultra low power dissipation, making
the devices ideally suited for portable and battery-powered
instruments.
Each switch conducts equally well in both directions when on,
and each switch has an input signal range that extends to the
Rev. 0
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
supplies. In the off condition, signal levels up to the supplies
are blocked.
The on-resistance profile is flat over the full analog input range,
which ensures linearity and low distortion when switching
audio signals.
PRODUCT HIGHLIGHTS
1.
2.
3.
SPI interface removes the need for parallel conversion,
logic traces, and reduces GPIO channel count.
Daisy-chain mode removes additional logic traces when
multiple devices are used.
CRC error detection, invalid read/write address detection,
and SCLK count error detection ensure a robust digital
interface.
CRC and error detection capabilities allow the use of the
ADGS1408/ADGS1409 in safety critical systems.
Minimal distortion.
4.
5.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2018 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
16791-002
ADGS1408/ADGS1409
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
±5 V Dual Supply ......................................................................... 5
12 V Single Supply ........................................................................ 7
Continuous Current per Channel, Sx or Dx ............................. 9
Timing Characteristics .............................................................. 10
Absolute Maximum Ratings.......................................................... 12
Thermal Resistance .................................................................... 12
ESD Caution ................................................................................ 12
Pin Configurations and Function Descriptions ......................... 13
Typical Performance Characteristics ........................................... 15
Test Circuits ..................................................................................... 19
Terminology .................................................................................... 22
Theory of Operation ...................................................................... 23
Address Mode ............................................................................. 23
Error Detection Features ........................................................... 23
Clearing the Error Flags Register ............................................. 24
Burst Mode .................................................................................. 24
Data Sheet
Software Reset ............................................................................. 24
Daisy-Chain Mode ..................................................................... 24
Power-On Reset .......................................................................... 25
Round Robin Mode.................................................................... 26
General-Purpose Outputs (GPOs) .......................................... 27
Applications Information .............................................................. 28
Digital Input Buffers .................................................................. 28
Power Supply Rails ..................................................................... 28
Power Supply Recommendations............................................. 28
Power Supply Sequencing ......................................................... 28
Register Summaries ........................................................................ 29
Register Details ............................................................................... 30
Switch Data Register .................................................................. 30
Error Configuration Register.................................................... 31
Error Flags Register .................................................................... 31
Burst Enable Register ................................................................. 32
Round Robin Enable Register................................................... 32
Round Robin Channel Configuration Register ..................... 32
CNV Edge Select Register ......................................................... 33
Software Reset Register ............................................................. 33
Outline Dimensions ....................................................................... 34
Ordering Guide .......................................................................... 34
REVISION HISTORY
6/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 34
Data Sheet
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, V
L
= 2.7 V to 5.5 V, and GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match Between
Channels, ∆R
ON
On-Resistance Flatness, R
FLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
Channel On Leakage, I
D
(On), I
S
(On)
DIGITAL OUTPUTS
SDO
Output Voltage
Low, V
OL
High Impedance Leakage
Current
High Impedance Output
Capacitance
GPOx
Output Voltage
High, V
OH
Low, V
OL
Timing
t
ON
(GPO)
t
OFF
(GPO)
Break-Before-Make Time Delay,
t
D
DIGITAL INPUTS
Input Voltage
High, V
INH
Low, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
0.001
±0.1
4
Rev. 0 | Page 3 of 34
ADGS1408/ADGS1409
+25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
Test Conditions/Comments
4
4.7
0.2
0.78
0.5
0.72
±0.04
±0.2
±0.04
±0.45
±0.1
±1.5
5.7
6.7
V
S
= ±10 V, I
S
= −10 mA, see Figure 32
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V, I
S
= −10 mA
0.85
0.77
1.1
0.92
V
S
= ±10 V, I
S
= −10 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
S
= ±10 V, V
D
= 10 V, see Figure 35
V
S
= ±10 V, V
D
= 10 V, see Figure 35
V
S
= V
D
= ±10 V, see Figure 31
±0.6
±2.0
±3.0
±5.0
±30.0
±30.0
0.4
0.2
0.001
±0.1
4
V max
V max
μA typ
μA max
pF typ
I
SINK
= 5 mA
I
SINK
= 1 mA
V
OUT
= V
GND
or V
L
V
L
− 0.2 V
0.2
95
115
15
20
50
V min
V max
ns typ
ns max
ns typ
ns max
ns typ
ns min
I
SOURCE
= 100 μA
I
SINK
= 100 μA
C
L
= 15 pF, see Figure 43
C
L
= 15 pF, see Figure 43
C
L
= 15 pF, see Figure 44
115
25
115
25
35
2
1.35
0.8
0.8
V min
V min
V max
V max
μA typ
μA max
pF typ
3.3 V < V
L
≤ 5.5 V
2.7 V ≤ V
L
≤ 3.3 V
3.3 V < V
L
≤ 5.5 V
2.7 V ≤ V
L
≤ 3.3 V
V
IN
= V
GND
or V
L
ADGS1408/ADGS1409
Parameter
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection, Q
INJ
Off Isolation
Channel to Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
ADGS1408
ADGS1409
Insertion Loss
C
S
(Off )
C
D
(Off )
ADGS1408
ADGS1409
C
D
(On), C
S
(On)
ADGS1408
ADGS1409
POWER REQUIREMENTS
I
DD
+25°C
145
185
120
165
125
155
40
20
−50
−64
−70
0.025
175
195
−40°C to +85°C
−40°C to +125°C
Unit
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
Data Sheet
Test Conditions/Comments
R
L
= 100 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 40
R
L
= 100 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 41
R
L
= 100 Ω, C
L
= 35 pF
V
S
= 10 V, see Figure 41
R
L
= 100 Ω, C
L
= 35 pF
V
S1
= V
S2
= 10 V, see Figure 39
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF,
see Figure 42
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 34
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 33
R
L
= 110 Ω, 15 V p-p, f = 20 Hz to
20 kHz, see Figure 36
R
L
= 50 Ω, C
L
= 5 pF, see Figure 37
220
185
245
200
60
115
0.24
14
80
40
135
90
0.002
1
220
380
270
440
MHz typ
MHz typ
dB typ
pF typ
pF typ
pF typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz,
see Figure 26 and Figure 27
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
pF typ
pF typ
μA typ
μA max
μA typ
μA max
μA typ
μA max
μA typ
μA max
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
μA typ
mA typ
mA max
mA typ
mA max
V
DD
= +16.5 V, V
SS
= −16.5 V
All switches open
S8/S4A closed, V
L
= 5.5 V
S8/S4A closed, V
L
= 2.7 V
I
L
Inactive
Inactive, SCLK = 1 MHz
SCLK = 50 MHz
Inactive, SDI = 1 MHz
SDI = 25 MHz
Active at 50 MHz
6.3
8.0
14
7
390
210
15
7.5
230
120
1.8
2.1
0.7
1.0
Rev. 0 | Page 4 of 34
Digital inputs = 0 V or V
L
CS = V
L
and SDI = 0 V or V
L
, V
L
= 5 V
CS = V
L
and SDI = 0 V or V
L
, V
L
= 3 V
CS = V
L
and SDI = 0 V or V
L
, V
L
= 5 V
CS = V
L
and SDI = 0 V or V
L
, V
L
= 3 V
CS and SCLK = 0 V or V
L
, V
L
= 5 V
CS and SCLK = 0 V or V
L
, V
L
= 3 V
CS and SCLK = 0 V or V
L
, V
L
= 5 V
CS and SCLK = 0 V or V
L
, V
L
= 3 V
Digital inputs toggle between
0 V and V
L
, V
L
= 5.5 V
E
E
E
E
E
E
E
E
Digital inputs toggle between
0 V and V
L
, V
L
= 2.7 V
Data Sheet
Parameter
I
SS
V
DD
/V
SS
+25°C
0.002
−40°C to +85°C
−40°C to +125°C
1
±4.5
±16.5
Unit
μA typ
μA max
V min
V max
ADGS1408/ADGS1409
Test Conditions/Comments
Digital inputs = 0 V or V
L
GND = 0 V
GND = 0 V
1
Guaranteed by design; not subject to production test.
±5 V DUAL SUPPLY
V
DD
= +5 V ± 10%, V
SS
= −5 V ± 10%, V
L
= 2.7 V to 5.5 V, and GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
+25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
7.4
9
0.3
0.78
1.5
2.5
±0.02
±0.2
±0.02
±0.45
±0.04
±0.3
10.5
12
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
Test Conditions/Comments
On-Resistance Match Between
Channels, ∆R
ON
On-Resistance Flatness, R
FLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
V
S
= ±4.5 V, I
S
= −10 mA, see
Figure 32
V
DD
= +4.5 V, V
SS
= −4.5 V
V
S
= ±4.5 V, I
S
= −10 mA
0.91
2.5
1.1
2.8
V
S
= ±4.5 V, I
S
= −10 mA
V
DD
= +5.5 V, V
SS
= −5.5 V
V
S
= ±4.5 V, V
D
= 4.5 V, Figure 35
V
S
= ±4.5 V, V
D
= 4.5 V, see
Figure 35
V
S
= V
D
= ±4.5 V, see Figure 31
±0.6
±5.0
±0.8
±1.1
±20.0
±22.0
Channel On Leakage, I
D
(On), I
S
(On)
DIGITAL OUTPUTS
SDO
Output Voltage
Low, V
OL
High Impedance Leakage Current
High Impedance Output
Capacitance
GPOx
Output Voltage
High, V
OH
Low, V
OL
Timing
t
ON
(GPO)
t
OFF
(GPO)
Break-Before-Make Time Delay, t
D
0.4
0.2
0.001
±0.1
4
V max
V max
μA typ
μA max
pF typ
I
SINK
= 5 mA
I
SINK
= 1 mA
V
OUT
= V
GND
or V
L
V
L
− 0.2 V
0.2
95
115
15
20
50
V min
V max
ns typ
ns max
ns typ
ns max
ns typ
ns min
I
SOURCE
= 100 μA
I
SINK
= 100 μA
C
L
= 15 pF, see Figure 43
C
L
= 15 pF, see Figure 43
C
L
= 15 pF, see Figure 44
115
25
115
25
35
Rev. 0 | Page 5 of 34
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