EEWORLDEEWORLDEEWORLD

Part Number

Search

PIC18F85J10I/PTSQTP

Description
64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology
File Size3MB,394 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet View All

PIC18F85J10I/PTSQTP Overview

64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F85J10I/PTSQTP Preview

PIC18F87J10 Family
Data Sheet
64/80-Pin High-Performance,
1-Mbit Flash Microcontrollers
with nanoWatt Technology
2005 Microchip Technology Inc.
Advance Information
DS39663A
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EE
L
OQ
, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel and Total
Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
®
8-bit MCUs, K
EE
L
OQ
®
code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS39663A-page ii
Advance Information
2005 Microchip Technology Inc.
PIC18F87J10 FAMILY
64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers
with nanoWatt Technology
Special Microcontroller Features:
Operating voltage range: 2.0V to 3.6V
5.5V tolerant input (digital pins only)
On-chip 2.5V regulator
Low-power, high-speed CMOS Flash technology
C compiler optimized architecture:
- Optional extended instruction set designed to
optimize re-entrant code
Priority levels for interrupts
8 x 8 Single-Cycle Hardware Multiplier
Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
Single-Supply In-Circuit Serial Programming™
(ICSP™) via two pins
In-Circuit Debug (ICD) with three Break points via
two pins
Power-Managed modes:
- Run: CPU on, peripherals on
- Idle: CPU off, peripherals on
- Sleep: CPU off, peripherals off
Peripheral Highlights:
• High-current sink/source 25 mA/25 mA
(PORTB and PORTC)
• Four programmable external interrupts
• Four input change interrupts
• Two Capture/Compare/PWM (CCP) modules
• Three Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-Shutdown and Auto-Restart
• Two Master Synchronous Serial Port (MSSP)
modules supporting 3-wire SPI™ (all 4 modes)
and I
2
C™ Master and Slave modes
• Two Enhanced Addressable USART modules:
- Supports RS-485, RS-232 and LIN 1.2
- Auto-Wake-up on Start bit
- Auto-Baud Detect
• 10-bit, up to 15-channel Analog-to-Digital
Converter module (A/D):
- Auto-acquisition capability
- Conversion available during Sleep
- Self-calibration feature
• Dual analog comparators with input multiplexing
Flexible Oscillator Structure:
Two Crystal modes, up to 40 MHz
4x Phase Lock Loop (PLL)
Two External Clock modes, up to 40 MHz
Internal 31 kHz oscillator
Secondary oscillator using Timer1 @ 32 kHz
Two-Speed Oscillator Start-up
Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock
stops
External Memory Bus
(PIC18F8XJ10/8XJ15 only):
• Address capability of up to 2 Mbytes
• 8-bit or 16-bit interface
• 12-bit, 16-bit and 20-bit Addressing modes
2005 Microchip Technology Inc.
Advance Information
DS39663A-page 1
PIC18F87J10 FAMILY
Comparators
EUSART
Program Memory
Device
SRAM Data
Flash # Single-Word Memory
(bytes)
(bytes) Instructions
32K
48K
64K
96K
128K
32K
48K
64K
96K
128K
16384
24576
32768
49152
65536
16384
24576
32768
49152
65536
2048
2048
2048
3936
3936
2048
2048
2048
3936
3936
I/O
10-bit
A/D (ch)
CCP/
ECCP
(PWM)
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2
2
2
2
2
2
2
2
2
2
MSSP
SPI™
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Master
I
2
C™
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
External Bus
N
N
N
N
N
Y
Y
Y
Y
Y
Timers
8/16-bit
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
2/3
PIC18F65J10
PIC18F65J15
PIC18F66J10
PIC18F66J15
PIC18F67J10
PIC18F85J10
PIC18F85J15
PIC18F86J10
PIC18F86J15
PIC18F87J10
50
50
50
50
50
66
66
66
66
66
11
11
11
11
11
15
15
15
15
15
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Pin Diagrams
64-Pin TQFP
RE2/CS/P2B
RE3/P3C
RE4/P3B
RE5/P1C
RE6/P1B
RE7/ECCP2
(1)
/P2A
(1)
RD0/PSP0
V
DD
V
SS
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4/SDO2
RD5/PSP5/SDI2/SDA2
RD6/PSP6/SCK2/SCL2
RD7/PSP7/SS2
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
RE1/WR/P2C
RE0/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
MCLR
RG4/CCP5/P1D
V
SS
V
DDCORE
/V
CAP
RF7/SS1
RF6/AN11
RF5/AN10/CV
REF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIC18F6XJ10
PIC18F6XJ15
RB0/INT0/FLT0
RB1/INT1
RB2/INT2
RB3/INT3
RB4/KBI0
RB5/KBI1
RB6/KBI2/PGC
V
SS
OSC2/CLKO
OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC5/SDO1
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
Note 1:
The ECCP2/P2A pin placement depends on the setting of the CCP2MX configuration bit.
RF1/AN6/C2OUT
ENVREG
AV
DD
AV
SS
RA3/AN3/V
REF
+
RA2/AN2/V
REF
-
RA1/AN1
RA0/AN0
V
SS
V
DD
RA5/AN4
RA4/T0CKI
RC1/T1OSI/ECCP2
(1)
/P2A
(1)
RC0/T1OSO/T13CKI
RC6/TX1/CK1
RC7/RX1/DT1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DS39663A-page 2
Advance Information
2005 Microchip Technology Inc.
PIC18F87J10 FAMILY
Pin Diagrams (Continued)
RD6/AD6/PSP6/SCK2/SCL2
RE7/AD15/ECCP2
(1)
/P2A
(1)
RD5/AD5/PSP5/SDI2/SDA2
80-Pin TQFP
RE2/AD10/CS/P2B
RE5/AD13/P1C
(2)
RD4/AD4/PSP4/SDO2
RE3/AD11/P3C
(2)
RH1/A17
RH0/A16
RD7/AD7/PSP7/SS2
63
RE4/AD12/P3B
(2)
RE6/AD14/P1B
(2)
RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RJ0/ALE
62
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
RH2/A18
RH3/A19
RE1/AD9/WR/P2C
RE0/AD8/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
MCLR
RG4/CCP5/P1D
V
SS
V
DDCORE
/V
CAP
RF7/SS1
RF6/AN11
RF5/AN10/CV
REF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RH7/AN15/P1B
(2)
RH6/AN14/P1C
(2)
61
RJ1/OE
V
DD
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
RJ2/WRL
RJ3/WRH
RB0/INT0/FLT0
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2
(1)
/P2A
(1)
RB4/KBI0
RB5/KBI1
RB6/KBI2/PGC
V
SS
OSC2/CLKO
OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC5/SDO1
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RJ7/UB
RJ6/LB
PIC18F8XJ10
PIC18F8XJ15
RF1/AN6/C2OUT
ENVREG
RA4/T0CKI
RC1/T1OSI/ECCP2
(1)
/P2A
(1)
RC0/T1OSO/T13CKI
AV
SS
RA3/AN3/V
REF
+
RA2/AN2/V
REF
-
RA5/AN4
RH5/AN13/P3B
(2)
Note 1:
The ECCP2/P2A pin placement depends on the setting of the CCP2MX configuration bit and the program memory mode.
2:
P1B, P1C, P3B and P3C pin placement depends on the setting of the ECCPMX configuration bit.
RH4/AN12/P3C
2005 Microchip Technology Inc.
Advance Information
RC7/RX1/DT1
RC6/TX1/CK1
RA1/AN1
RA0/AN0
RJ4/BA0
RJ5/CE
(2)
AV
DD
V
SS
V
DD
DS39663A-page 3
Has anyone used adders and FIFOs to implement accumulators?
I use a floating point adder IP core and FIFO to implement the accumulator operation. Because the adder has a delay, the value read from the fifo and the input value do not arrive at the two ends of t...
huangfujing FPGA/CPLD
The latest practical classic circuit examples for electrical engineers
The latest practical classic circuit examples for electrical engineers...
wangwei20060608 RF/Wirelessly
Bluetooth technology used in wireless data collection
1. First understand the relevant functions of this development kit 2. Combine this kit with existing sensors 3. Collect sensor data with a laptop...
allan0508 Wireless Connectivity
How to port uCOS-II to LPC17XX
1. Knowledge preparation To have a deeper understanding of the UCOS-II porting, two aspects of knowledge are required: (1) Target chip. Here is the LPC17xx series chip. They are all based on the ARMv7...
灞波儿奔 Microcontroller MCU
How is the ADS configuration file .HFC generated?
:D May I ask all the experts, how is the ADS configuration file .HFC generated? Using IAR seems to be .ICF file, what is the function of this thing?...
zhangbinkui818 MCU
PCB Design - Why are the signals of the two identical DDRs different in the picture?
My question: As shown in the figure, two DDRs, Why is the DDR mark point ② on the right side Vref_DDR_DQ_1? Instead of Vref_DDR_CA_2 (or Vref_DDR_CA_1) like the DDR mark point ① on the left, Shouldn't...
普拉卡图 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 793  1417  116  1914  577  16  29  3  39  12 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号