FW322 07 NV129/NV100/T100
1394a PCI PHY/Link Open Host Controller Interface
Product Brief
Features
129-ball VTFSBGA/100-ball FSBGA/100-pin TQFP
lead-free package.
1394a-2000 OHCI link and PHY core function in a sin-
gle device:
— Single-chip link and PHY enable smaller, simpler,
more efficient motherboard and add-in card designs.
— Compatibility with current
Microsoft Windows
®
driv-
ers and common applications.
— Interoperability with existing, as well as older, 1394
consumer electronics and peripherals products.
OHCI:
— Complies with the
1394 OHCI 1.1 Specification.
— OHCI 1.0 backwards compatible: configurable via
PCI bus commands to operate in either OHCI 1.0 or
OHCI 1.1 mode.
— Listed on
Windows
hardware compatibility list
http://testedproducts.windowsmarketplace.com.
— Compatible with
Microsoft Windows
and
MacOS
®
operating systems.
— 4 Kbyte isochronous transmit FIFO.
— 2 Kbyte asynchronous transmit FIFO.
— 4 Kbyte isochronous receive FIFO.
— 2 Kbyte asynchronous receive FIFO.
— Dedicated asynchronous and isochronous descrip-
tor-based DMA engines.
— Eight isochronous transmit/receive contexts.
— Prefetches isochronous transmit data.
— Supports posted write transactions.
— Supports parallel processing of incoming physical
read and write requests.
— May be used without an EEPROM when the system
BIOS is programmed with the EEPROM contents.
1394a-2000 PHY core:
— Compliant with
IEEE
®
1394a-2000, Standard for a
High Performance Serial Bus.
— Two fully compliant cable ports, each supporting
400 Mbits/s, 200 Mbits/s, and 100 Mbits/s traffic.
— Does not require external filter capacitor for PLL.
— Supports link-on as a part of the internal
PHY core-link interface.
— Supports arbitrated short bus reset to improve
utilization of the bus.
— Supports multispeed packet concatenation.
— Reports cable power fail interrupt when voltage at
CPS pin falls below 7.5 V.
Product Brief
PCI:
— Revision 2.3 compliant.
— 33 MHz/32-bit operation.
— Programmable burst size thresholds for PCI data
transfer.
— Supports optimized memory read line, memory read
multiple, and memory write invalidate burst com-
mands.
— Supports
PCI Bus Power Management Interface
Specification
v.1.1.
— Supports CLKRUN# protocol per PCI Mobile Design
Guide.
— Supports
Mini PCI Specification
v1.0, including
Mini
PCI
®
power requirements.
— CardBus support per PC card standard release 8.0,
including 128 bytes of on-chip tuple memory.
Other Features
CMOS process.
3.3 V operation, 5 V tolerant inputs.
I
2
C serial ROM interface.
Note:
The T100 device does not support D3cold wakeup,
CLKRUN protocol,
Mini PCI
applications, or Card-
Bus applications.
www.agere.com
September 2006
FW322 07 NV129/NV100/T100
1394a PHY/Link Open Host Controller Interface
Product Brief
September 2006
Block Diagram
OHCI
ASYNCHRONOUS
DATA
TRANSFER
PCI
BUS
PCI
CORE
OHCI
ISOCHRONOUS
DATA
TRANSFER
LINK
CORE
PHY
CORE
CABLE PORT 1
CABLE PORT 0
ROM
I/F
Ordering Information
Device Code
L-FW322-07-NV129-DB*
L-FW322-07-NV129-DT*
†
L-FW322-07-NV100-DB*
L-FW322-07-NV100-DT*
†
L-FW322 07 T100-DB*
L-FW322 07 T100-DT*
†
Package
129-Ball VTFSBGAC
129-Ball VTFSBGAC
100-Ball FSBGA
100-Ball FSBGA
100-Pin TQFP
100-Pin TQFP
Comcode
711008047
711008048
711010597
711010598
711008303
711008304
* Lead-free: No intentional addition of lead, and less than 1000 ppm. Agere Systems’ lead-free devices are fully compliant with the Restriction of
Hazardous Substances (RoHS) directive that restricts the content of six hazardous substances in electronic equipment in the European Union.
Beginning July 1, 2006, electronic equipment sold in the European Union must be manufactured in accordance with the standards set by the RoHS
directive.
† Tape and reel.
®
™
For additional information, contact your Agere Systems Account Manager, sales at www.agere.com/sales, or email us at docmaster@agere.com.
Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application.
Agere, Agere Systems, and the Agere logo are registered trademarks of Agere Systems Inc.
Microsoft
and
Windows
are registered trademarks of Microsoft Corporation.
MacOS
is a registered trade-
mark and
FireWire
is a trademark of Apple Computer, Inc.
i.Link
is a registered trademark of Sony Corporation.
IEEE
is a registered trademark of The Institute of Electrical and Electronics Engineers,
Inc.
Copyright © 2006 Agere Systems Inc. All Rights Reserved.
September 2006
PB06-011CMPR-2 (Replaces PB06-011CMPR-1)
Analogue and Mixed Signal
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