datasheet
EEWORLDEEWORLDEEWORLD
Datasheet
Part Number

Keyword

Search
Keyword

Part Number

Search
Datasheet> All Categories > P4C17015PM
PDF
Preview

P4C17015PM

Description
ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
File Size55KB，8 Pages
ManufacturerETC
Download Datasheet View All

P4C17015PM Overview

ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS

P4C17015PM Preview

P4C168, P4C169, P4C170
P4C168, P4C169, P4C170
ULTRA HIGH SPEED 4K x 4
STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 12/15/20/25ns (Commercial)
– 20/25/35ns (P4C168 Military)
Low Power Operation (Commercial)
– 715 mW Active
– 193 mW Standby (TTL Input) P4C168
– 83 mW Standby (CMOS Input) P4C168
Single 5V
±
10% Power Supply
Fully TTL Compatible, Common I/O Ports
Three Options
– P4C168 Low Power Standby Mode
– P4C169 Fast Chip Select Control
– P4C170 Fast Chip Select, Output Enable
Controls
Standard Pinout (JEDEC Approved)
– P4C168: 20-pin DIP, SOJ and SOIC
– P4C169: 20-pin DIP and SOIC
– P4C170: 22-pin DIP
DESCRIPTION
The P4C168, P4C169 and P4C170 are a family of 16,384-
bit ultra high-speed static RAMs organized as 4K x 4. All
three devices have common input/output ports.The
P4C168 enters the standby mode when the chip enable
(CE) control goes high; with CMOS input levels, power
consumption is only 83mW in this mode. Both the P4C169
and the P4C170 offer a fast chip select access time that is
only 67% of the address access time. In addition, the
P4C170 includes an output enable (OE) control to elimi-
nate data bus contention. The RAMs operate from a single
5V
±
10% tolerance power supply.
Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption to a low 715
mW active, 193 mW standby.
The P4C168 and P4C169 are available in 20-pin (P4C170
in 22-pin) 300 mil DIP packages providing excellent board
level densities. The P4C168 is also available in 20-pin 300
mil SOIC and SOJ packages.
The P4C169 is also available in a 20-pin 300 mil SOIC
package. The P4C170 is also available in a 22-pin 300 mil
SOJ package.
FUNCTIONAL BLOCK DIAGRAM
A
ROW
SELECT
A
16,384-BIT
MEMORY
ARRAY
PIN CONFIGURATIONS
(7)
A
0
A
1
A
2
INPUT
DATA
CONTROL
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
A
11
A
10
A
9
A
8
I/O
4
I/O
3
I/O
2
I/O
1
WE
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CS
OE
GND
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
V
CC
A
11
A
10
A
9
A
8
NC
I/O
4
I/O
3
I/O
2
I/O
1
WE
I/O
1
I/O
2
I/O
3
I/O
4
COLUMN I/O
A
3
A
4
A
5
A
6
A
7
CE, CS
GND
POWER
DOWN
COLUMN
SELECT
CE or CS
WE
OE
NOTES:
CE
USED ON P4C168 ALSO FOR POWER DOWN FUNCTIONS
CE
USED ON P4C169 FAST CHIP SELECT
OE
OUTPUT ENABLE FUNCTION ON P4C170 ONLY
P4C168
ONLY
A
(5)
A
P4C168
P4C169
DIP (P2, D2) DIP (P2)
SOIC (S2)
SOIC (S2)
SOJ (J2)
TOP VIEW
P4C170
DIP (P3)
TOP VIEW
Means Quality, Service and Speed
1Q97
33
P4C168, P4C169, P4C170
MAXIMUM RATINGS
(1)
Symbol
V
CC
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND
(up to 7.0V)
Operating Temperature
Value
– 0.5 to +7
– 0.5 to
V
CC
+0.5
–55 to +125
Unit
V
Symbol
T
BIAS
T
STG
V
°C
P
T
I
OUT
Parameter
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
– 55 to +125
– 65 to +150
1.0
50
Unit
°C
°C
W
mA
V
TERM
T
A
RECOMMENDED OPERATING CONDITIONS
Grade
(2)
Commercial
Military
Ambient Temp
0°C to 70°C
–55°C to +125°C
Gnd
0V
0V
V
CC
5.0V
±
10%
5.0V
±
10%
CAPACITANCES
(4)
(V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Conditions Typ. Unit
V
IN
= 0V
5
7
pF
pF
Output Capacitance V
OUT
= 0V
DC ELECTRICAL CHARACTERISTICS
P4C168/169/170
Symbol
V
IH
V
IL
V
HC
V
LC
V
CD
V
OL
V
OLC
V
OH
V
OHC
I
LI
I
LO
I
CC
I
SB
Parameter
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
Output Low Voltage
(TTL Load)
Output Low Voltage
(CMOS Load)
Output High Voltage
(TTL Load)
Output High Voltage
(CMOS Load)
Input Leakage Current
Output Leakage Current
Dynamic Operating
Current
Standby Power Supply
Current (TTL Input Levels)
P4C168 only
Standby Power
Supply Current
(CMOS Input Levels)
P4C168 only
V
CC
= Min., I
IN
= –18 mA
I
OL
= +8 mA, V
CC
= Min.
I
OLC
= +100
µA,
V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
I
OHC
= –100
µA,
V
CC
= Min.
V
CC
= Max., V
IN
= GND to V
CC
V
CC
= Max.,
CS
= V
IH
,
V
OUT
= GND to V
CC
Mil.
Comm’l
Mil.
Comm’l
2.4
V
CC
–0.2
–10
–5
–10
–5
___
___
Test Conditions
Min
2.2
–0.5(3)
V
CC
–0.2
–0.5(3)
Max
V
CC
+0.5
0.8
V
CC
+0.5
0.2
–1.2
0.4
0.2
Unit
V
V
V
V
V
V
V
V
V
+10
+5
+10
+5
130
35
µA
µA
mA
mA
V
CC
= Max., f = Max., Outputs Open
CE
≥
V
IH
, V
CC
= Max., f = Max.,
Outputs Open
CE
≥
V
HC
, V
CC
= Max., f = 0,
Outputs Open
V
IN
≤
V
LC
or V
IN
≥
V
HC
I
SB1
___
15
mA
34
P4C168, P4C169, P4C170
AC CHARACTERISTICS—READ CYCLE
(V
CC
= 5V
±
10%, All Temperature Ranges)
(2)
Sym.
t
RC
t
AA
t
AC§
t
AC‡
t
OH
t
LZ‡
t
HZ†
t
OE†
t
OLZ†
t
OHZ†
t
RCS
t
RCH
t
PU§
t
PD§
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Select Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Output Enable to Data Valid
Output Enable to Output in Low Z
Output Disable to Output in High Z
Read Command Setup Time
Read Command Hold Time
Chip Enable to Power Up Time
Chip Disable to Power Down Time
0
0
0
0
2
2
–12
12
12
12
8
2
2
6
8
0
6
0
0
0
12
–15
15
15
15
9
2
2
7
10
0
7
0
0
0
15
–20
20
20
20
12
2
2
9
12
0
9
0
0
0
20
–25
–35
Unit
ns
Min Max Min Max Min Max Min Max Min Max
25
25
25
15
2
2
10
15
0
11
0
0
0
25
35
15
15
15
35
35
35
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
§ P4C168 only
† P4C170 only
‡ Chip Select/Deselect for P4C169 and P4C170
TIMING WAVEFORM OF READ CYCLE NO. 1 (ADDRESS CONTROLLED)
(5,6)
(9)
t
RC
ADDRESS
t
AA
t
OH
DATA OUT
PREVIOUS DATA VALID
DATA VALID
Notes:
5.
WE
is HIGH for READ cycle.
6.
CE/CS
and
OE
are LOW for READ cycle.
35
P4C168, P4C169, P4C170
TIMING WAVEFORM OF READ CYCLE NO. 2 (CE
CS
CONTROLLED)
(5,7)
CE/CS
CE
READ CYCLE WAVEFORM NO. 2 (CS Controlled)
t
RC
CE/CS
(7)
(5,7)
t
AC
DATA VALID
t
OLZ
(7)
t
HZ
(7)
t
LZ
DATA OUT
HIGH IMPEDANCE
(7)
t
OHZ
t
OE
OE
(P4C170)
t
RCS
WE
I
CC
V
CC
SUPPLY
CURRENT
(P4C168 ONLY)
I
SB
t
PU
t
PD
t
RCH
TIMING WAVEFORM OF READ CYCLE NO. 3—P4C170 ONLY (OE CONTROLLED)
(5)
OE
(9)
t
RC
ADDRESS
t
AA
OE
t
OE
(8)
t
OH
t
OLZ
CS
AC
(8)
t
LZ
t
t
(8)
OHZ
(8)
t
HZ
DATA OUT
Notes:
7. ADDRESS must be valid prior to, or coincident with
CE/CS
transition
low. For Fast
CS,
t
AA
must still be met.
8. Transition is measured
±200mV
from steady state voltage prior to
change, with loading as specified in Figure 1.
1521 05
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
36
P4C168, P4C169, P4C170
AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE
(V
CC
= 5V
±
10%, All Temperature Ranges)
(2)
Sym.
t
WC
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Parameter
Write Cycle Time
Chip Enable Time to
End of Write
Address Valid to
End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time
Data Valid to End
of Write
Data Hold Time
Write Enable to
Output in High Z
Output Active from
End of Write
0
–12
12
12
12
0
12
0
7
0
4
0
–15
15
15
15
0
15
0
8
0
5
0
–20
18
18
18
0
18
0
10
0
7
0
–25
20
20
20
0
20
0
10
0
7
0
–35
35
30
30
0
30
0
15
0
13
Min Max Min Max Min Max Min Max Min Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)
(10)
WE
t
WC
ADDRESS
t
CW
CE/CS
t
AW
t
WP
WE
t
AS
DATA IN
t
WZ
DATA OUT
DATA UNDEFINED
HIGH IMPEDANCE
(8)
(12)
t
WR
t
AH
t
DW
DATA VALID
t
DH
t
OW
(8,11)
Notes:
10.
CE/CS
and
WE
must be LOW for WRITE cycle.
11. If
CE/CS
goes HIGH simultaneously with
WE
HIGH, the output
remains in a high impedance state.
12. Write Cycle Time is measured from the last valid address to the first
transitioning address.
37
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

Recommended Resources

PFC design analysis to realize three-phase uncontrolled rectification circuit

YSS247 application circuit

Sensor equivalent circuit diagram

Power converter circuit diagram from 13.8V to 90V

Single-phase full-wave rectification π-type filter circuit

LC2210 lock switch settings

Sampling time and conversion time of STM32AD?
Is it right to say that "ADC sampling time should be greater than AD conversion time"?The sampling time of each channel of STM32 ADC can be set to 1.5, 7.5, ..., 239.5 by using the time registers ADC_...
wzyllgx stm32/stm8
MCU circuit design expert
Please add QQ: 602199326...
chuangxin129 Embedded System
After maximizing the terminal PDA interface, make a picture button to display the power and WLAN
The terminal collector uses SYMBOL's 9300. When I maximize the window, the status bar is hidden (as required). So I need to display the power and the wireless LAN settings myself. If you have done it,...
licaiyanding Embedded System
Discussion on Topic B
[i=s] This post was last edited by paulhyde on 2014-9-15 09:26 [/i] Please share your questions about question B and we can solve them together...
小果冻 Electronics Design Contest
In order for us to discuss in more detail in the future: Please tell us what application products are there in security?
I hope you can list the security application products you know or the security technologies you are concerned about. The more detailed the better. If you find the content that everyone is interested i...
soso Industrial Control Electronics
Help! Vivado error, I need help
I'm a newbie. I found the vivado source code on the Internet. No errors were detected, but errors were shown during simulation and synthesis. Only errors were shown during synthesis, but I didn't find...
lll424168013 FPGA/CPLD
Shortcut:   S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components

  1. 1112XFREQ2AC
  2. 155222-2400-RA-WE
  3. 587-10-400-10-005437
  4. CM22AH-70.000MHZ
  5. 2225H1K50270FXT
  6. P0603K2211CGPE
  7. M2PP-25N-R2/N
  8. BLU2512-3613-QB10W
  9. AME8500AEETAF15
  10. AME8501BEFVDF21
  11. CR2512F332KE04Z
  12. TR0805B1911P

Popular Articles

  1. ZDS2022 Oscilloscope 100 Practical Specials 16: Template Trigger
  2. A 24.6 billion yuan financing cooperation agreement involving major projects such as Jingxin Semiconductor was signed in Hubei
  3. Technical parameters and specifications of tuning fork level switch
  4. STM8 MCU ADC single sampling mode
  5. Deputy Secretary-General of the China Internal Combustion Engine Society: The gap between Chinese and foreign hybrid technology is reflected in four aspects
  6. iQOO 9 series preheating: VC three-dimensional cooling system
  7. Samsung Galaxy Z Fold3 5G removes restrictions, unlocking bootloader will not disable camera
  8. Nintendo Switch OLED Chinese version product barcode has been registered and approved
  9. VIAVI presents new fiber testing solutions at OFC, empowering fiber testing and certification with innovative technologies
  10. S3C2440 DMA Working Principle

Technical ResourceMore

  1. Automatic ratio group tester technical data
  2. Design of broadband DC amplifier based on single chip microcomputer MSP430F449
  3. How to install plugins in AD10 [revised version]
  4. STM32USART1 serial port receiving program (interrupt mode)
  5. Design of Parallel Execution Model in xPC Real-time Semi-Physical Simulation Platform
  6. MAX3747A, MAX3747B Low-Power SFP Limiting Amplifiers
  7. Reduce your system power and cost with Artix-7 FPGAs
  8. Design of remote monitoring system for temperature and humidity based on SHT11
  9. Intentionally nonlinear DAC
  10. Computer virus prevention

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

About Us Customer Service Contact Information Datasheet Sitemap LatestNews
Index Files: 2519  1  96  2421  1760  51  1  2  49  36 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号