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P4C148-25PC

Description
ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS
Categorystorage    storage   
File Size277KB,10 Pages
ManufacturerPyramid Semiconductor Corporation
Websitehttp://www.pyramidsemiconductor.com/
Download Datasheet Parametric View All

P4C148-25PC Overview

ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS

P4C148-25PC Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerPyramid Semiconductor Corporation
Parts packaging codeDIP
package instruction0.300 INCH, PLASTIC, DIP-18
Contacts18
Reach Compliance Codecompli
ECCN codeEAR99
Maximum access time25 ns
Other featuresLOW POWER STANDBY MODE
I/O typeCOMMON
JESD-30 codeR-PDIP-T18
JESD-609 codee0
length22.86 mm
memory density4096 bi
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of terminals18
word count1024 words
character code1000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize1KX4
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP18,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height5.334 mm
Maximum standby current0.01 A
Minimum standby current4.5 V
Maximum slew rate0.1 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
P4C148, P4C149
ULTRA HIGH SPEED 1K x 4
STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25/35/45/55 ns (Commercial)
– 15/20/25/35/45/55 ns (P4C148 Military)
Low Power Operation
Single 5V ± 10% Power Supply
Two Options
– P4C148 Low Power Standby Mode
– P4C149 Fast Chip Select Control
Common Input/Output Ports
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 18 Pin 300 mil DIP
– 18 Pin LCC (295 x 335 mil) [P4C148 only]
– 18 Pin LCC (290 x 430 mil)
DESCRIPTION
The P4C148 and P4C149 are 4,096-bit ultra high-speed
static RAMs organized as 1K x 4. Both devices have
common input/output ports. The P4C148 enters the
standby mode when the chip enable (CE) goes HIGH;
with CMOS input levels, power consumption is extremely
low in this mode. The P4C149 features a fast chip select
capability using
CS.
The CMOS memories require no
clocks or refreshing, and have equal access and cycle
times. Inputs are fully TTL-compatible. The RAMs
operate from a single 5V
±
10% tolerance power supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption when
active; for the P4C148, consumption is further reduced in
the standby mode.
The P4C148 and P4C149 are available in 18-pin 300 mil
DIP packages, as well as 2 different LCC packages,
providing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
P4C148 DIP (C9, D1, P1)
P4C149 DIP (P1)
P4C148 LCC (L7, L7-1)
P4C149 LCC (L7)
Document #
SRAM104
REV B
1
Revised April 2007
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