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HI1-0384-2

Description
DPST, 2 Func, 2 Channel, CMOS, CDIP16
CategoryAnalog mixed-signal IC    The signal circuit   
File Size64KB,7 Pages
ManufacturerHarris
Websitehttp://www.harris.com/
Related ProductsFound15parts with similar functions to HI1-0384-2
Download Datasheet Parametric Compare View All

HI1-0384-2 Overview

DPST, 2 Func, 2 Channel, CMOS, CDIP16

HI1-0384-2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionDIP, DIP16,.3
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesDPST
JESD-30 codeR-GDIP-T16
JESD-609 codee0
Nominal Negative Supply Voltage (Vsup)-15 V
normal positionNO
Number of channels2
Number of functions2
Number of terminals16
Nominal off-state isolation60 dB
Maximum on-state resistance (Ron)50 Ω
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
outputSEPARATE OUTPUT
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply+-15 V
Certification statusNot Qualified
Nominal supply voltage (Vsup)15 V
surface mountNO
Maximum disconnect time250 ns
Maximum connection time300 ns
switchBREAK-BEFORE-MAKE
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Base Number Matches1
S E M I C O N D U C T O R
HI-381 thru HI-390
CMOS Analog Switches
Description
The Hl-381 thru Hl-390 series of switches are monolithic de-
vices fabricated using CMOS technology and the Harris dielec-
tric isolation process. These devices are TTL compatible and
are available in four switching configurations. (See device
pinout for particular switching function with a logic “1” input.)
These switches feature low leakage and supply currents, low
and nearly constant ON resistance over the analog signal
range, break-before-make switching and low power dissipa-
tion.
August 1997
Features
Analog Signal Range (±15V Supplies) . . . . . . . .
±15V
Low Leakage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40pA
Low On Resistance . . . . . . . . . . . . . . . . . . . . . . . . . .35Ω
Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns
Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . .30pC
TTL Compatible
Symmetrical Switch Elements
Low Operating Power . . . . . . . . . . . . . . . . . . . . . 1.0mW
Applications
Sample and Hold (i.e., Low Leakage Switching)
Op Amp Gain Switching (i.e., Low On Resistance)
Portable, Battery Operated Circuits
Low Level Switching Circuits
Dual or Single Supply Systems
(Switch States are for a Logic “1” Input)
SPST HI-301 AND HI-305
TOP VIEWS
(CERDIP, PDIP)
NC 1
9
D
2
8
IN
2
NC 2
D
1
3
S
1
4
IN
1
3
4
V+
5
NC
6
GND
NC 7
8 GND
7 V-
IN 5
V+ 6
14 NC
13 NC
12 D
2
11 S
2
10 NC
9 V-
V+
D
1
1
S
1
2
IN
3
4
5
NC
6
Pinouts
DUAL SPST HI-300 AND HI-304
TOP VIEWS
(CERDIP, PDIP)
(METAL CAN)
S
1
1
D
1
2
NC 3
NC 4
IN
1
5
V+ 6
NC 7
14 S
2
13 D
2
12 NC
11 NC
10 IN
2
9 V-
8 GND
D
1
S
1
2
1
S
2
10
(METAL CAN)
D2
10
9 S
2
8 NC
7 V-
GND
LOGIC
0
1
SWITCH
OFF
ON
The substrate and case are
internally tied to V-. (The case
should not be used as the V-
connection, however.)
LOGIC
0
1
SW1
OFF
ON
SW2
ON
OFF
The substrate and case are
internally tied to V-. (The case
should not be used as the V-
connection, however.)
DUAL DPST HI-384 (CERDIP, PDIP)
TOP VIEW
D
1
1
NC 2
D
3
3
S
3
4
S
4
5
D
4
6
NC 7
D
2
8
16 S
1
15 IN
1
14 V-
13 GND
12 NC
11 V+
10 IN
2
9 S
2
D
1
1
DUAL SPDT HI-390 (CERDIP, PDIP, SOIC)
TOP VIEW
16 S
1
15 IN
1
14 V-
13 GND
12 NC
11 V+
10 IN
2
9 S
2
LOGIC
0
1
SW 1 - 4
OFF
ON
NC 2
D
3
3
S
3
4
S
4
5
D
4
6
NC 7
D
2
8
LOGIC
0
1
SW1
SW2
OFF
ON
SW3
SW4
ON
OFF
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1997
File Number
3126.1
13-94

HI1-0384-2 Related Products

HI1-0384-2 HI1-0381-5 HI3-0387-5 HI3-0384-5 HI1-0387-2 HI3-0381-5 HI1-0387-5 HI1-0390-5 HI3-0390-5
Description DPST, 2 Func, 2 Channel, CMOS, CDIP16 SPST, 2 Func, 1 Channel, CMOS, CDIP14 SPDT, 1 Func, 1 Channel, CMOS, PDIP14 DPST, 2 Func, 2 Channel, CMOS, PDIP16 SPDT, 1 Func, 1 Channel, CMOS, CDIP14 SPST, 2 Func, 1 Channel, CMOS, PDIP14 SPDT, 1 Func, 1 Channel, CMOS, CDIP14 SPDT, 2 Func, 1 Channel, CMOS, CDIP16 SPDT, 2 Func, 1 Channel, CMOS, PDIP16
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
package instruction DIP, DIP16,.3 DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP16,.3 DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP16,.3 DIP, DIP16,.3
Reach Compliance Code unknown unknow unknown unknown unknown unknown unknown unknow unknow
Analog Integrated Circuits - Other Types DPST - - DPST SPDT - - SPDT SPDT
JESD-30 code R-GDIP-T16 - - R-PDIP-T16 R-GDIP-T14 - - R-GDIP-T16 R-PDIP-T16
JESD-609 code e0 - - e0 e0 - - e0 e0
Nominal Negative Supply Voltage (Vsup) -15 V - - -15 V -15 V - - -15 V -15 V
Number of channels 2 - - 2 1 - - 1 1
Number of functions 2 - - 2 1 - - 2 2
Number of terminals 16 - - 16 14 - - 16 16
Nominal off-state isolation 60 dB - - 60 dB 60 dB - - 60 dB 60 dB
Maximum on-state resistance (Ron) 50 Ω - - 50 Ω 50 Ω - - 50 Ω 50 Ω
Maximum operating temperature 125 °C - - 75 °C 125 °C - - 75 °C 75 °C
Package body material CERAMIC, GLASS-SEALED - - PLASTIC/EPOXY CERAMIC, GLASS-SEALED - - CERAMIC, GLASS-SEALED PLASTIC/EPOXY
encapsulated code DIP - - DIP DIP - - DIP DIP
Encapsulate equivalent code DIP16,.3 - - DIP16,.3 DIP14,.3 - - DIP16,.3 DIP16,.3
Package shape RECTANGULAR - - RECTANGULAR RECTANGULAR - - RECTANGULAR RECTANGULAR
Package form IN-LINE - - IN-LINE IN-LINE - - IN-LINE IN-LINE
power supply +-15 V - - +-15 V +-15 V - - +-15 V +-15 V
Certification status Not Qualified - - Not Qualified Not Qualified - - Not Qualified Not Qualified
Nominal supply voltage (Vsup) 15 V - - 15 V 15 V - - 15 V 15 V
surface mount NO - - NO NO - - NO NO
Maximum disconnect time 250 ns - - 250 ns 250 ns - - 250 ns 250 ns
Maximum connection time 300 ns - - 300 ns 300 ns - - 300 ns 300 ns
switch BREAK-BEFORE-MAKE - - BREAK-BEFORE-MAKE BREAK-BEFORE-MAKE - - BREAK-BEFORE-MAKE BREAK-BEFORE-MAKE
technology CMOS - - CMOS CMOS - - CMOS CMOS
Temperature level MILITARY - - COMMERCIAL EXTENDED MILITARY - - COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal surface Tin/Lead (Sn/Pb) - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE - - THROUGH-HOLE THROUGH-HOLE - - THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm - - 2.54 mm 2.54 mm - - 2.54 mm 2.54 mm
Terminal location DUAL - - DUAL DUAL - - DUAL DUAL
Maker - - Harris Harris Harris Harris Harris Harris Harris

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