74AHCT32D,118 datasheet, PDF - EEWORLD Datasheet

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74AHCT32D,118: Description74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin; Categorylogic logic; File Size224KB，13 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74AHCT32D,118 Overview

74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin

74AHCT32D,118 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Is it Rohs certified?	conform to
Maker	Nexperia
Parts packaging code	SOIC
package instruction	3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14
Contacts	14
Manufacturer packaging code	SOT108-1
Reach Compliance Code	compliant
Samacsys Confidence	2
Samacsys Status	Released
Samacsys PartID	4691229
Samacsys Pin Count	14
Samacsys Part Category	Integrated Circuit
Samacsys Package Category	Small Outline Packages
Samacsys Footprint Name	SO14
Samacsys Released Date	2019-11-04 20:21:44
Is Samacsys	N
series	AHCT/VHCT
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	8.65 mm
Logic integrated circuit type	OR GATE
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	10 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
Base Number Matches	1

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74AHC32; 74AHCT32

Quad 2-input OR gate

Rev. 5 — 5 June 2020

Product data sheet

1. General description

The 74AHC32; 74AHCT32 is a quad 2-input OR gate. Inputs are overvoltage tolerant. This feature

allows the use of these devices as translators in mixed voltage environments.

2. Features and benefits

•

Wide supply voltage range from 2.0 V to 5.5 V

Input levels:

•

For 74AHC32: CMOS level

•

For 74AHCT32: TTL level

Balanced propagation delays

All inputs have Schmitt-trigger actions

Overvoltage tolerant inputs to 5.5 V

High noise immunity

CMOS low power dissipation

ESD protection:

•

HBM EIA/JESD22-A114E exceeds 2000 V

•

MM EIA/JESD22-A115-A exceeds 200 V

•

CDM EIA/JESD22-C101C exceeds 1000 V

Latch-up performance exceeds 100 mA per JESD 78 Class II Level A

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

74AHC32D

74AHCT32D

74AHC32PW

74AHCT32PW

74AHC32BQ

74AHCT32BQ

-40 °C to +125 °C

TSSOP14

-40 °C to +125 °C

SO14

Description

plastic small outline package; 14 leads;

body width 3.9 mm

Version

SOT108-1

plastic thin shrink small outline package; 14 leads; SOT402-1

body width 4.4 mm

SOT762-1

DHVQFN14 plastic dual in-line compatible thermal

enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 × 3 × 0.85 mm

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	74AHCT32D,118	74AHC32BQ,115	74AHC32D,112	74AHC32D,118	74AHC32PW,112	74AHC32PW,118	74AHCT32BQ,115	74AHCT32D,112	74AHCT32PW,112	74AHCT32PW,118
Description	74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate QFN 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate TSSOP 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate TSSOP 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate QFN 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate SOIC 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate TSSOP 14-Pin	74AHC32; 74AHCT32 - Quad 2-input OR gate TSSOP 14-Pin
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Maker	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	SOIC	QFN	SOIC	SOIC	TSSOP	TSSOP	QFN	SOIC	TSSOP	TSSOP
package instruction	3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14	HVQCCN,	3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14	3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14	4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14	4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14	HVQCCN,	3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14	4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14	4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14
Contacts	14	14	14	14	14	14	14	14	14	14
Manufacturer packaging code	SOT108-1	SOT762-1	SOT108-1	SOT108-1	SOT402-1	SOT402-1	SOT762-1	SOT108-1	SOT402-1	SOT402-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Samacsys Confidence	2	2	2	2	2	2	2	2	2	2
Samacsys Status	Released	Released	Released	Released	Released	Released	Released	Released	Released	Released
Samacsys PartID	4691229	1845186	1156245	1156246	1730997	1068715	1451878	4691228	4691554	4691555
Samacsys Pin Count	14	15	14	14	14	14	15	14	14	14
Samacsys Part Category	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit	Integrated Circuit
Samacsys Package Category	Small Outline Packages	Quad Flat No-Lead	Small Outline Packages	Small Outline Packages	Small Outline Packages	Small Outline Packages	Quad Flat No-Lead	Small Outline Packages	Small Outline Packages	Small Outline Packages
Samacsys Footprint Name	SO14	DHVQFN14	SO14	SO14	SOT402-1	SOT402-1	DHVQFN14	SO14	SOT402-1	SOT402-1
Samacsys Released Date	2019-11-04 20:21:44	2019-11-04 22:31:38	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-12 07:41:52	2019-11-04 20:21:44	2019-11-04 20:21:44	2019-11-04 20:21:44
Is Samacsys	N	N	N	N	N	N	N	N	N	N
series	AHCT/VHCT	AHC/VHC/H/U/V	AHC	AHC	AHC	AHC	AHCT/VHCT/VT	AHCT/VHCT	AHCT/VHCT	AHCT/VHCT
JESD-30 code	R-PDSO-G14	R-PQCC-N14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PQCC-N14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
JESD-609 code	e4	e4	e4	e4	e4	e4	e4	e4	e4	e4
length	8.65 mm	3 mm	8.65 mm	8.65 mm	5 mm	5 mm	3 mm	8.65 mm	5 mm	5 mm
Logic integrated circuit type	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE
Humidity sensitivity level	1	1	1	1	1	1	1	1	1	1
Number of functions	4	4	4	4	4	4	4	4	4	4
Number of entries	2	2	2	2	2	2	2	2	2	2
Number of terminals	14	14	14	14	14	14	14	14	14	14
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	HVQCCN	SOP	SOP	TSSOP	TSSOP	HVQCCN	SOP	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260	260	260	260
propagation delay (tpd)	10 ns	14.5 ns	14.5 ns	14.5 ns	14.5 ns	14.5 ns	10 ns	10 ns	10 ns	10 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1 mm	1.75 mm	1.75 mm	1.1 mm	1.1 mm	1 mm	1.75 mm	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	2 V	2 V	2 V	2 V	2 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	NO LEAD	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	0.5 mm	1.27 mm	1.27 mm	0.65 mm	0.65 mm	0.5 mm	1.27 mm	0.65 mm	0.65 mm
Terminal location	DUAL	QUAD	DUAL	DUAL	DUAL	DUAL	QUAD	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30	30	30	30
width	3.9 mm	2.5 mm	3.9 mm	3.9 mm	4.4 mm	4.4 mm	2.5 mm	3.9 mm	4.4 mm	4.4 mm
Base Number Matches	1	1	1	1	1	1	1	1	1	1
Is it Rohs certified?	conform to	-	conform to	conform to	conform to	conform to	-	conform to	conform to	conform to

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