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DM9002CN

Description
IC,LOGIC GATE,QUAD 2-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC
Categorylogic    logic   
File Size79KB,3 Pages
ManufacturerNational Semiconductor(TI )
Websitehttp://www.ti.com
Stay tuned Parametric Compare

DM9002CN Overview

IC,LOGIC GATE,QUAD 2-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC

DM9002CN Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNational Semiconductor(TI )
Reach Compliance Codecompliant
Is SamacsysN
JESD-30 codeR-PDIP-T14
JESD-609 codee0
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.016 A
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Maximum supply current (ICC)6.1 mA
Prop。Delay @ Nom-Sup15 ns
Certification statusNot Qualified
Schmitt triggerNO
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Base Number Matches1

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Description IC,LOGIC GATE,QUAD 2-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC IC,LOGIC GATE,2/2/2/3IN AND-NOR,STD-TTL,DIP,14PIN,PLASTIC IC,LOGIC GATE,2/2/2/3IN AND-NOR,STD-TTL,DIP,14PIN,CERAMIC IC,GATE EXPANDER,STD-TTL,DIP,14PIN,CERAMIC IC,GATE EXPANDER,STD-TTL,DIP,14PIN,PLASTIC IC,LOGIC GATE,DUAL 4-INPUT NAND,STD-TTL,DIP,14PIN,CERAMIC IC,LOGIC GATE,DUAL 4-INPUT NAND,STD-TTL,DIP,14PIN,PLASTIC
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant
JESD-30 code R-PDIP-T14 R-PDIP-T14 R-XDIP-T14 R-XDIP-T14 R-PDIP-T14 R-XDIP-T14 R-PDIP-T14
JESD-609 code e0 e0 e0 e0 e0 e0 e0
Number of terminals 14 14 14 14 14 14 14
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC CERAMIC PLASTIC/EPOXY CERAMIC PLASTIC/EPOXY
encapsulated code DIP DIP DIP DIP DIP DIP DIP
Encapsulate equivalent code DIP14,.3 DIP14,.3 DIP14,.3 DIP14,.3 DIP14,.3 DIP14,.3 DIP14,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE IN-LINE IN-LINE IN-LINE IN-LINE
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
surface mount NO NO NO NO NO NO NO
technology TTL TTL TTL TTL TTL TTL TTL
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Base Number Matches 1 1 1 1 1 1 1
Maker National Semiconductor(TI ) - - National Semiconductor(TI ) National Semiconductor(TI ) National Semiconductor(TI ) National Semiconductor(TI )
Logic integrated circuit type NAND GATE AND-OR-INVERT GATE AND-OR-INVERT GATE - - NAND GATE NAND GATE
MaximumI(ol) 0.016 A 0.016 A 0.016 A - - 0.016 A 0.016 A
Maximum supply current (ICC) 6.1 mA 17.7 mA 17.7 mA - - 14.6 mA 14.6 mA
Prop。Delay @ Nom-Sup 15 ns 15 ns 15 ns - - 17 ns 17 ns
Schmitt trigger NO NO NO - - NO NO
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