MPC8541CVTAQF datasheet, PDF - EEWORLD Datasheet

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MPC8541CVTAQF: Description32-BIT, 533 MHz, RISC PROCESSOR, PBGA783; Categorysemiconductor The embedded processor and controller; File Size1MB，84 Pages; ManufacturerFREESCALE (NXP)

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MPC8541CVTAQF Overview

32-BIT, 533 MHz, RISC PROCESSOR, PBGA783

MPC8541CVTAQF Parametric

Parameter Name	Attribute value
External data bus width	64
Number of terminals	783
Minimum operating temperature	0.0 Cel
Maximum operating temperature	105 Cel
Line speed	533 MHz
Processing package description	29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, LEAD FREE, FLIP CHIP, PLASTIC, BGA-783
state	Active
microprocessor_microcontroller_peripheral_ic_type	MICROPROCESSOR, RISC
Address bus width	64
Number of digits	32
boundary scan	YES
clock_frequency_max	166 MHz
form	FLOATING POINT
Integrated cache	YES
jesd_30_code	R-PBGA-B783
jesd_609_code	e2
low power mode	YES
moisture_sensitivity_level	3
Packaging Materials	PLASTIC/EPOXY
ckage_code	HBGA
packaging shape	RECTANGULAR
Package Size	GRID ARRAY, HEAT SINK/SLUG
eak_reflow_temperature__cel_	260
qualification_status	COMMERCIAL
seated_height_max	3.75 mm
Rated supply voltage	1.2 V
Minimum supply voltage	1.14 V
Maximum supply voltage	1.26 V
surface mount	YES
Craftsmanship	CMOS
Temperature level	OTHER
terminal coating	TIN COPPER/TIN SILVER
Terminal form	BALL
Terminal spacing	1 mm
Terminal location	BOTTOM
ime_peak_reflow_temperature_max__s_	40
length	29 mm
width	29 mm

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Freescale Semiconductor

Technical Data

MPC8541EEC

Rev. 4, 12/2006

MPC8541E PowerQUICC™ III

Integrated Communications Processor

Hardware Specifications

The MPC8541E integrates a PowerPC™ processor core

built on Power Architecture™ technology with system logic

required for networking, telecommunications, and wireless

infrastructure applications. The MPC8541E is a member of

the PowerQUICC™ III family of devices that combine

system-level support for industry-standard interfaces with

processors that implement the embedded category of the

Power Architecture technology. For functional

characteristics of the processor, refer to the

MPC8555E

PowerQUICC™ III Integrated Communications Processor

Reference Manual.

To locate any published errata or updates for this document

refer to http://www.freescale.com or contact your Freescale

sales office.

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Contents

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 7

Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11

Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . 14

DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Ethernet: Three-Speed, MII Management . . . . . . . . . . 20

Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

CPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . . . 53

Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

System Design Information . . . . . . . . . . . . . . . . . . . . . 75

Document Revision History . . . . . . . . . . . . . . . . . . . . 82

Device Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . 82

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