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EQRA25L2H-87.182M TR

Description
CMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.0Vdc 6 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.0Vdc 6 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)
CategoryPassive components    oscillator   
File Size939KB,7 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance  
Download Datasheet Parametric View All

EQRA25L2H-87.182M TR Overview

CMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.0Vdc 6 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.0Vdc 6 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)

EQRA25L2H-87.182M TR Parametric

Parameter NameAttribute value
Brand NameEcliptek
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSMD 3.2mm x 5.0mm
Contacts6
Manufacturer packaging codeSMD 3.2mm x 5.0mm
Reach Compliance Code163
Is SamacsysN
Ageing2 PPM/FIRST YEAR
technologyCMOS
Base Number Matches1
EQRA25L2H-87.182M
REGULATORY COMPLIANCE
2011/65 +
2015/863
(Data Sheet downloaded on Aug 25, 2020)
191 SVHC
ITEM DESCRIPTION
Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.0Vdc 6 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)
87.182MHz ±25ppm over -40°C to +85°C
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 25°C
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Phase Noise
87.182MHz
±25ppm Maximum over -40°C to +85°C (Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency Stability
over the Operating Temperature Range, Supply Voltage Change and Output Load Change)
±2ppm Maximum First Year, ±10ppm/10 Years Maximum
3.0Vdc ±5%
25mA Maximum (Unloaded)
90% of Vdd Minimum (IOH = -4mA)
10% of Vdd Maximum (IOL = +4mA)
3nSec Maximum (Measured at 10% to 90% of Waveform)
50 ±5(%) (Measured at 50% of Waveform)
15pF Maximum
CMOS
-58dBc/Hz at 10Hz offset; -90dBc/Hz at 100Hz offset; -118dBc/Hz at 1kHz offset; -125dBc/Hz at 10kHz offset; -
126dBc/Hz at 100kHz offset; -145dBc/Hz at 1MHz offset; -155dBc/Hz at 10MHz offset; -157dBc/Hz at 20MHz offset (All
Values are Typical)
Output Enable (OE)
90% of Vdd Minimum or No Connect to Enable Output
10% of Vdd Maximum to Disable Output (High Impedance)
100nSec Maximum
50nSec Maximum
15mA Maximum (Without Load (Pin 1 = Ground))
1.4pSec Maximum (Fj=12kHz to 20MHz (Random))
0.2pSec Typical
2pSec Typical
3pSec Maximum
30pSec Maximum
10mSec Maximum
-55°C to +125°C
Output Control Function
Output Control Input Voltage Logic
High (Vih)
Output Control Input Voltage Logic
Low (Vil)
Output Enable Time
Output Disable Time
Output Enable Current
RMS Phase Jitter
Period Jitter (Deterministic)
Period Jitter (Random)
Period Jitter (RMS)
Period Jitter (pk-pk)
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Fine Leak Test
Flammability
Gross Leak Test
Mechanical Shock
Moisture Resistance
Moisture Sensitivity
Resistance to Soldering Heat
MIL-STD-883, Method 3015, Class 1, HBM: 1500V
MIL-STD-883, Method 1014, Condition A
UL94-V0
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
www.ecliptek.com | Specification Subject to Change Without Notice | Revision B 01/28/2015 | Page 1 of 7
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
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