IDT72V3623L12PF8 datasheet, PDF

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IDT72V3623L12PF8: DescriptionFIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128; Categorystorage storage; File Size221KB，27 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT72V3623L12PF8 Overview

FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128

IDT72V3623L12PF8 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	LFQFP,
Contacts	128
Reach Compliance Code	compliant
ECCN code	EAR99
Is Samacsys	N
Maximum access time	8 ns
period time	12 ns
JESD-30 code	R-PQFP-G128
JESD-609 code	e0
length	20 mm
memory density	9216 bit
memory width	36
Humidity sensitivity level	3
Number of functions	1
Number of terminals	128
word count	256 words
character code	256
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256X36
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm
Base Number Matches	1

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3.3 VOLT CMOS SyncFIFO

WITH BUS-MATCHING

256 x 36, 512 x 36, 1,024 x 36

FEATURES:

• Memory storage capacity:

IDT72V3623–256 x 36

IDT72V3633–512 x 36

IDT72V3643–1,024 x 36

• Clock frequencies up to 83 MHz (8 ns access time)

• Clocked FIFO buffering data from Port A to Port B

FF)

• IDT Standard timing (using

and

or First Word Fall

Through Timing (using OR and IR flag functions)

• Programmable Almost-Empty and Almost-Full flags; each has

three default offsets (8, 16 and 64)

• Serial or parallel programming of partial flags

• Port B bus sizing of 36 bits (long word), 18 bits (word) and 9 bits

(byte)

PRELIMINARY

IDT72V3623

IDT72V3633

IDT72V3643

• Big- or Little-Endian format for word and byte bus sizes

• Reset clears data and configures FIFO, Partial Reset clears data

but retains configuration settings

• Mailbox bypass registers for each FIFO

• Free-running CLKA and CLKB may be asynchronous or

coincident (simultaneous reading and writing of data on a single

clock edge is permitted)

• Easily expandable in width and depth

• Auto power down minimizes power dissipation

• Available in a space-saving 128-pin Thin Quad Flatpack (TQFP)

• Pin and functionally compatible versions of the 5V operating

IDT723623/723633/723643

• Industrial temperature range (–40

C to +85

C) is available

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

Port-A

Control

Logic

Bus-

Matching

Input

Output

CLKA

CSA

W/RA

ENA

MBA

RS1

RS2

PRS

RAM ARRAY

FIFO1

Mail1,

Mail2,

Reset

Logic

256 x 36

512 x 36

1,024 x 36

-A

Write

Pointer

Read

Pointer

-B

FF/IR

Status Flag

Logic

EF/OR

SPM

FS0/SD

FS1/SEN

Programmable Flag

Offset Registers

Timing

Mode

Port-B

Control

Logic

Mail 2

MBF2

FWFT

CLKB

CSB

W/RB

ENB

MBB

SIZE

4662 drw 01

June 1999

1999

Integrated Device Technology, Inc.

DSC-4662/-

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Description	FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 1KX36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 1KX36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 1KX36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 512X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 512X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128	FIFO, 512X36, 8ns, Synchronous, CMOS, PQFP128, TQFP-128
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP
package instruction	LFQFP,	TQFP-128	LFQFP,	TQFP-128	TQFP-128	TQFP-128	TQFP-128	TQFP-128	TQFP-128
Contacts	128	128	128	128	128	128	128	128	128
Reach Compliance Code	compliant	compliant	compliant	not_compliant	not_compliant	compliant	compliant	not_compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	8 ns	8 ns	8 ns	8 ns	8 ns	8 ns	8 ns	8 ns	8 ns
period time	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns	12 ns
JESD-30 code	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128	R-PQFP-G128
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm
memory density	9216 bit	36864 bit	36864 bit	36864 bit	9216 bit	9216 bit	18432 bit	18432 bit	18432 bit
memory width	36	36	36	36	36	36	36	36	36
Humidity sensitivity level	3	3	3	3	3	3	3	3	3
Number of functions	1	1	1	1	1	1	1	1	1
Number of terminals	128	128	128	128	128	128	128	128	128
word count	256 words	1024 words	1024 words	1024 words	256 words	256 words	512 words	512 words	512 words
character code	256	1000	1000	1000	256	256	512	512	512
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	256X36	1KX36	1KX36	1KX36	256X36	256X36	512X36	512X36	512X36
Exportable	YES	YES	YES	YES	YES	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFQFP	LFQFP	LFQFP	LFQFP	LFQFP	LFQFP	LFQFP	LFQFP	LFQFP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	240	240	240	240	240	240	240	240	240
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	TIN LEAD	TIN LEAD	Tin/Lead (Sn/Pb)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	TIN LEAD	TIN LEAD	Tin/Lead (Sn85Pb15)	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	20	20	20	20	20	20	20	20	20
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
Maker	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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