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SST421NL-E3

Description
Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, LEAD FREE, SOIC-8
CategoryDiscrete semiconductor    The transistor   
File Size103KB,6 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
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SST421NL-E3 Overview

Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, LEAD FREE, SOIC-8

SST421NL-E3 Parametric

Parameter NameAttribute value
Parts packaging codeSOT
package instructionSMALL OUTLINE, R-PDSO-G8
Contacts8
Reach Compliance Codeunknown
Other featuresLOW NOISE
ConfigurationSEPARATE, 2 ELEMENTS
FET technologyJUNCTION
Maximum feedback capacitance (Crss)1.5 pF
JESD-30 codeR-PDSO-G8
Number of components2
Number of terminals8
Operating modeDEPLETION MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
SST421NL/423NL
Vishay Siliconix
Monolithic N-Channel JFET Duals
PRODUCT SUMMARY
Part Number
SST421NL
SST423NL
V
GS(off)
(V)
−0.4
to−2
−0.4
to
−2
V
(BR)GSS
Min (V)
−40
−40
g
fs
Min (mS)
0.3
0.3
jV
GS1
V
GS2
j
Max (mV)
10
25
FEATURES
D
D
D
D
D
D
D
Anti Latchup Capability
Monolithic Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 0.6 pA
Low Noise
High CMRR: 102 dB
BENEFITS
D
D
D
D
D
D
D
External Substrate Bias—Avoids Latchup
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
APPLICATIONS
D
Ultralow Input Current
Differential Amps
D
High-Speed Comparators
D
Impedance Converters
DESCRIPTION
The SST421NL/423NL are monolithic dual n-channel JFETs
designed to provide very high input impedance for differential
amplification and impedance matching. Among its many
unique features, this series offers low operating gate current.
The SO-8 package provides ease of manufacturing, and the
symmetrical pinout prevents improper orientation. The SO-8
package is available with tape-and-reel options for
compatibility with automatic assembly methods.
Pins 4 and 8 on SST421NL/423NL part numbers enable the
substrate to be connected to a positive polarity, external bias
(V
DD
) to avoid latchup.
Similar versions of these part numbers are available in the
hermetically sealed TO-78 package. Full military processing
is available. See data sheets for part numbers U421/423.
Narrow Body SOIC
S
1
D
1
G
1
SUBSTRATE
1
2
3
4
Top View
Marking Codes:
SST421NL
(421NL)
SST423NL
(423NL)
8
7
6
5
SUBSTRATE
G
2
D
2
S
2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
V
Gate-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
"40
V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Lead Temperature (
1
/
16
” from case for 10 sec.) . . . . . . . . . . . . . . . . . . 300
_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 200_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .
−55
to 150_C
Power Dissipation :
Per Side
a
. . . . . . . . . . . . . . . . . . . . . . . . 300 mW
Total
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2.4 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
Document Number: 72060
S-40391—Rev. B, 15-Mar-04
www.vishay.com
1

SST421NL-E3 Related Products

SST421NL-E3 SST423NL-E3 SST421NL-T1 SST421NL-T1-E3
Description Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, LEAD FREE, SOIC-8 Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, LEAD FREE, SOIC-8 Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, SOIC-8 Small Signal Field-Effect Transistor, 2-Element, N-Channel, Silicon, Junction FET, LEAD FREE, SOIC-8
Parts packaging code SOT SOT SOT SOT
package instruction SMALL OUTLINE, R-PDSO-G8 SMALL OUTLINE, R-PDSO-G8 SMALL OUTLINE, R-PDSO-G8 SMALL OUTLINE, R-PDSO-G8
Contacts 8 8 8 8
Reach Compliance Code unknown unknown unknown unknown
Other features LOW NOISE LOW NOISE LOW NOISE LOW NOISE
Configuration SEPARATE, 2 ELEMENTS SEPARATE, 2 ELEMENTS SEPARATE, 2 ELEMENTS SEPARATE, 2 ELEMENTS
FET technology JUNCTION JUNCTION JUNCTION JUNCTION
Maximum feedback capacitance (Crss) 1.5 pF 1.5 pF 1.5 pF 1.5 pF
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 R-PDSO-G8
Number of components 2 2 2 2
Number of terminals 8 8 8 8
Operating mode DEPLETION MODE DEPLETION MODE DEPLETION MODE DEPLETION MODE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Polarity/channel type N-CHANNEL N-CHANNEL N-CHANNEL N-CHANNEL
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
surface mount YES YES YES YES
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL
transistor applications SWITCHING SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON SILICON SILICON SILICON
Maker - Vishay Vishay Vishay

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