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SN54/74LS114A

Description
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
File Size148KB,4 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
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SN54/74LS114A Overview

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

SN54/74LS114A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54/ 74LS114A offers common clock and common clear inputs and
individual J, K, and set inputs. These monolithic dual flip-flops are designed
so that when the clock goes HIGH, the inputs are enabled and data will be
accepted. The logic level of the J and K inputs may be allowed to change when
the clock pulse is HIGH and the bistable will perform according to the truth
table as long as minimum set-up times are observed. Input data is transferred
to the outputs on the negative-going edge of the clock pulse.
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
LOGIC DIAGRAM
(Each Flip-Flop)
J SUFFIX
CERAMIC
CASE 632-08
14
Q
5(9)
6(8)
Q
1
CLEAR (CD)
TO
OTHER
FLIP FLOP
J
3(11)
13
CLOCK (CP)
4(10)
SET (SD)
K
2(12)
14
1
N SUFFIX
PLASTIC
CASE 646-06
14
1
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
MODE SELECT — TRUTH TABLE
INPUTS
OPERATING MODE
SD
Set
Reset (Clear)
*Undetermined
Toggle
Load “0” (Reset)
Load “1” (Set)
Hold
L
H
L
H
H
H
H
CD
H
L
L
H
H
H
H
J
X
X
X
h
l
h
l
K
X
X
X
h
h
l
l
Q
H
L
H
q
L
H
q
Q
L
H
H
q
H
L
q
3
OUTPUTS
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
4
10
* Both outputs will be HIGH while both SD and CD are LOW, but the output states
are unpredictable if SD and CD go HIGH simultaneously.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input (or output)
l, h (q) =
one set-up time prior to the HIGH to LOW clock transition.
J
CP
SD
Q
5
11
J
CP
SD
Q
9
13
2
K
CD
Q
6
12
K
CD
Q
8
1
VCC = PIN 14
GND = PIN 7
FAST AND LS TTL DATA
5-193

SN54/74LS114A Related Products

SN54/74LS114A SN54LSXXXJ SN74LSXXXN SN5474LS114A 74LS114A SN74LSXXXD
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
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