DS2011R-80 datasheet, PDF - EEWORLD Datasheet

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DS2011R-80: DescriptionFIFO, 2KX9, 80ns, Asynchronous, CMOS, PQCC32,; Categorystorage storage; File Size22KB，1 Pages; ManufacturerDALLAS; Websitehttp://www.dalsemi.com

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DS2011R-80 Overview

FIFO, 2KX9, 80ns, Asynchronous, CMOS, PQCC32,

DS2011R-80 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Reach Compliance Code	unknown
Maximum access time	80 ns
Other features	RETRANSMIT
Maximum clock frequency (fCLK)	10 MHz
period time	100 ns
JESD-30 code	S-PQCC-J32
JESD-609 code	e0
memory density	18432 bit
Memory IC Type	OTHER FIFO
memory width	9
Number of functions	1
Number of terminals	32
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX9
Output characteristics	3-STATE
Exportable	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.002 A
Maximum slew rate	0.12 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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DS2011

2048 x 9 FIFO Chip

FEATURES

PIN ASSIGNMENT

GND

VCC

4 3 2 1 32 31 30

13 15

17 19 21

14 16

GND

32-Pin PLCC

051994 1/1

FL/RT

X0/HF

•

First-in, first-out memory-based architecture

•

Flexible 2048 x 9 organization

•

Low-power HCMOS technology

•

Asychronous and simultaneous read/write

•

Bidirectional applications

•

Fully expandable by word width or depth

•

Empty and full warning flags

•

Half-full flag capability in single-device mode

•

Retransmit capability

•

High performance

•

Available in 50 ns, 65 ns, 80 ns, and 120 ns access

times

FL/RT

X0/HF

28-Pin DIP

(300 and 600 Mil)

PIN DESCRIPTION

FL/RT

0-8

XO/HF

GND

WRITE

READ

RESET

First Load/Retransmit

Data In

Data Out

Expansion In

Expansion Out/Half Full

Full Flag

Empty Flag

–

5 Volts

– Ground

– No Connect

–

•

Optional industrial temperature range -40°C to +85

available, designated N

DESCRIPTION

The DS2011 FIFO Chip implements a first-in, first-out

algorithm featuring asynchronous read/write opera-

tions, full, empty, and half-full flags, and unlimited ex-

pansion capability in both word size and depth. The

DS2011 is functionally and electrically equivalent to the

DS2009 512 x 9 FIFO Chip, with the exceptions listed in

the notes for DC Electrical Characteristics of the

DS2009 data sheet. Refer to the DS2009 data sheet for

detailed device description.

ECopyright

1995 by Dallas Semiconductor Corporation.

patents and other intellectual property rights, please refer to

Dallas Semiconductor databooks.

DS2011R-80 Related Products

	DS2011R-80	DS2011D-50	DS2011D-120	DS2011R-50	DS2011R-65	DS2011D-65	DS2011RN-50	DS2011R-120	DS2011DN-50
Description	FIFO, 2KX9, 80ns, Asynchronous, CMOS, PQCC32,	FIFO, 2KX9, 50ns, Asynchronous, CMOS, PDIP28,	FIFO, 2KX9, 120ns, Asynchronous, CMOS, PDIP28,	FIFO, 2KX9, 50ns, Asynchronous, CMOS, PQCC32,	FIFO, 2KX9, 65ns, Asynchronous, CMOS, PQCC32,	FIFO, 2KX9, 65ns, Asynchronous, CMOS, PDIP28,	FIFO, 2KX9, 50ns, Asynchronous, CMOS, PQCC32,	FIFO, 2KX9, 120ns, Asynchronous, CMOS, PQCC32,	FIFO, 2KX9, 50ns, Asynchronous, CMOS, PDIP28,
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Reach Compliance Code	unknown	unknow	unknow	unknown	unknown	unknown	unknown	unknown	unknown
Maximum access time	80 ns	50 ns	120 ns	50 ns	65 ns	65 ns	50 ns	120 ns	50 ns
Other features	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT	RETRANSMIT
Maximum clock frequency (fCLK)	10 MHz	15.38 MHz	7.14 MHz	15.38 MHz	12.5 MHz	12.5 MHz	15.38 MHz	7.14 MHz	15.38 MHz
JESD-30 code	S-PQCC-J32	R-PDIP-T28	R-PDIP-T28	S-PQCC-J32	S-PQCC-J32	R-PDIP-T28	S-PQCC-J32	S-PQCC-J32	R-PDIP-T28
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
memory density	18432 bit	18432 bi	18432 bi	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit	18432 bit
Memory IC Type	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO	OTHER FIFO
memory width	9	9	9	9	9	9	9	9	9
Number of functions	1	1	1	1	1	1	1	1	1
Number of terminals	32	28	28	32	32	28	32	32	28
word count	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words	2048 words
character code	2000	2000	2000	2000	2000	2000	2000	2000	2000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	85 °C	70 °C	85 °C
organize	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9	2KX9
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	NO	NO	NO	NO	NO	NO	NO	NO	NO
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	DIP	DIP	QCCJ	QCCJ	DIP	QCCJ	QCCJ	DIP
Encapsulate equivalent code	LDCC32,.5X.6	DIP28,.3	DIP28,.3	LDCC32,.5X.6	LDCC32,.5X.6	DIP28,.3	LDCC32,.5X.6	LDCC32,.5X.6	DIP28,.3
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR
Package form	CHIP CARRIER	IN-LINE	IN-LINE	CHIP CARRIER	CHIP CARRIER	IN-LINE	CHIP CARRIER	CHIP CARRIER	IN-LINE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum standby current	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.0005 A	0.002 A
Maximum slew rate	0.12 mA	0.12 mA	0.12 mA	0.12 mA	0.12 mA	0.12 mA	0.12 mA	0.1 mA	0.12 mA
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	NO	YES	YES	NO	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	THROUGH-HOLE	THROUGH-HOLE	J BEND	J BEND	THROUGH-HOLE	J BEND	J BEND	THROUGH-HOLE
Terminal pitch	1.27 mm	2.54 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	QUAD	DUAL	DUAL	QUAD	QUAD	DUAL	QUAD	QUAD	DUAL
period time	100 ns	65 ns	140 ns	65 ns	80 ns	80 ns	-	140 ns	-
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	-	5.5 V	-
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	-	4.5 V	-
Base Number Matches	1	1	1	1	1	1	-	-	-

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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