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WB1220X-TR

Description
PLL Frequency Synthesizer, PDSO20, 0.173 INCH, MO-153, TSSOP-20
CategoryAnalog mixed-signal IC    The signal circuit   
File Size141KB,9 Pages
ManufacturerCypress Semiconductor
Environmental Compliance  
Download Datasheet Parametric View All

WB1220X-TR Overview

PLL Frequency Synthesizer, PDSO20, 0.173 INCH, MO-153, TSSOP-20

WB1220X-TR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeTSSOP
package instruction0.173 INCH, MO-153, TSSOP-20
Contacts20
Reach Compliance Codenot_compliant
Other featuresSELECTABLE 64/65 OR 128/129 PRESCALER
Analog Integrated Circuits - Other TypesPLL FREQUENCY SYNTHESIZER
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length6.5 mm
Humidity sensitivity level3
Number of functions1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature20
width4.4 mm
Base Number Matches1
WB1220
Serial Input PLL with 2.0-GHz Prescaler
Features
• Operating voltage 2.7V to 5.5V
• Operating frequency: up to 2.0 GHz with prescaler
ratios of 64/65 and 128/129
• Lock detect feature
• Power-down mode
• 20-pin TSSOP (Thin Shrink Small Outline Package)
Applications
Wireless LAN
Wireless communication handsets
Base Stations
Microcells
WB1220 PLL Block Diagram
GND (7)
V
CC
(5)
V
P
(4)
(6)
F
IN
(10)
Prescaler
64/65 or
128/129
Binary 7-Bit
Swallow Counter
Binary 11-Bit
Programmable Counter
fp
DO
Phase
Detector
Charge
Pump
(16)
BISW
(15)
FC
(20)
r
(18)
p
18-Bit
Latch
OSC_IN
OSC_OUT
(1)
14-Bit
Reference Counter
(3)
fr
(8)
LD
LE
(14)
Latch
Selector
15-Bit
Latch
DATA
(13)
Cntrl 19-Bit
Shift
Reg
Divider
Output
(fr/fp)
MUX
(17)
F
OUT
CLOCK
PWDN
(11)
(19)
Pin Configuration
OSC_IN
NC
OSC_OUT
V
P
V
CC
D
O
GND
LD
NC
F
IN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
r
PWDN
p
F
out
BISW
FC
LE
DATA
NC
CLOCK
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134 •
408-943-2600
February 2, 2000, rev. *A
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