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MC100LVEP05
2.5V / 3.3V ECL 2-Input
Differential AND/NAND
Description
The MC100LVEP05 is a 2−input differential AND/NAND gate.
The MC100LVEP05 is the low voltage version of the MC100EP05
and is functionally equivalent to the EL05 and LVEL05 devices. With
AC performance much faster than the LVEL05 device, the
MC100LVEP05 is ideal for low voltage applications requiring the
fastest AC performance available.
The 100 Series contains temperature compensation.
Features
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MARKING DIAGRAMS*
8
1
SOIC−8
D SUFFIX
CASE 751
1
8
KVP05
AYWWG
G
•
•
•
•
•
•
•
•
220 ps Typical Propagation Delay
Input Clock Frequency > 3 GHz
0.2 ps Typical RMS Random Clock Period Jitter
LVPECL Mode Operating Range: V
CC
= 2.375 V to 3.6 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
−2.375
V to
−3.6
V
Open Input Default State
Q Output Will Default LOW with Inputs Open
These are Pb−Free Devices*
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
KU05
ALYWG
G
1
1
DFN8
MN SUFFIX
CASE 506AA
4
6N MG
G
K
M
A
L
= MC100
= Date Code
= Assembly Location
= Wafer Lot
Y = Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2009
October, 2009
−
Rev. 2
1
Publication Order Number:
MC100LVEP05/D
MC100LVEP05
Table 1. PIN DESCRIPTION
D
0
1
8
V
CC
Q, Q
D
0
2
7
Q
V
CC
V
EE
EP
D
1
3
6
Q
Pin
D0*, D1*, D0**, D1**
Function
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect
to the most negative supply (GND) or
leave unconnected, floating open.
* Pins will default LOW when left open.
** Pins will default to V
CC
/2when left open.
D
1
4
5
V
EE
Table 2. TRUTH TABLE
D0
D1
L
H
L
H
D0
H
H
L
L
D1
H
L
H
L
Q
L
L
L
H
Q
H
H
H
L
Figure 1. 8−Lead Pinout
(Top View)
and Logic
Diagram
L
L
H
H
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Pb Pkg
Level 1
Level 1
Value
75 kW
37.5 kW
> 4 kV
> 200 V
> 2 kV
Pb−Free Pkg
Level 3
Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
TSSOP−8
DFN8
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
167 Devices
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2
MC100LVEP05
Table 4. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
q
JA
T
sol
q
JC
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
3 sec @ 260°C
(Note 2)
DFN8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
v
V
CC
V
I
w
V
EE
Condition 2
Rating
6
−6
6
−6
50
100
−40
to +85
−65
to +150
185
140
41 to 44
129
84
265
35 to 40
Unit
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board
−
2S2P (2 signal, 2 power)
Table 5. 100EP DC CHARACTERISTICS, PECL
V
CC
= 2.5 V, V
EE
= 0 V (Note 3)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 4)
Output LOW Voltage (Note 4)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Notes 5, 6)
Input HIGH Current
Input LOW Current
D
D
0.5
−150
Min
15
1355
555
1355
555
1.2
Typ
25
1480
730
Max
32
1605
900
1620
900
2.5
Min
17
1355
555
1355
555
1.2
25°C
Typ
27
1480
730
Max
36
1605
900
1620
900
2.5
Min
19
1355
555
1355
555
1.2
85°C
Typ
28
1480
730
Max
38
1605
900
1620
900
2.5
Unit
mA
mV
mV
mV
mV
V
I
IH
I
IL
150
0.5
−150
150
0.5
−150
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.125 V to
−1.3
V.
4. All loading with 50
W
to V
CC
−
2.0 V.
5. Single−ended input CLK pin operation is limited to V
CC
3.0 V in PECL mode.
6. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
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3
MC100LVEP05
Table 6. 100EP DC CHARACTERISTICS, PECL
V
CC
= 3.3 V, V
EE
= 0 V (Note 7)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 8)
Output LOW Voltage (Note 8)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 9)
Input HIGH Current
Input LOW Current
D
D
0.5
−150
Min
15
2155
1355
2075
1355
1.2
Typ
25
2280
1530
Max
32
2405
1700
2420
1675
3.3
Min
17
2155
1355
2075
1355
1.2
25°C
Typ
27
2280
1530
Max
36
2405
1700
2420
1675
3.3
Min
19
2155
1355
2075
1355
1.2
85°C
Typ
28
2280
1530
Max
38
2405
1700
2420
1675
3.3
Unit
mA
mV
mV
mV
mV
V
I
IH
I
IL
150
0.5
−150
150
0.5
−150
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.3 V to
−2.2
V.
8. All loading with 50
W
to V
CC
−
2.0 V.
9. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
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