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HD74ACT165RP

Description
Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DN
Categorylogic    logic   
File Size68KB,11 Pages
ManufacturerHitachi (Renesas )
Websitehttp://www.renesas.com/eng/
Download Datasheet Parametric Compare View All

HD74ACT165RP Overview

Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DN

HD74ACT165RP Parametric

Parameter NameAttribute value
Parts packaging codeSOIC
package instructionSOP,
Contacts16
Reach Compliance Codeunknown
Other featuresCLOCK INHIBIT
Counting directionRIGHT
seriesACT
JESD-30 codeR-PDSO-G16
length9.9 mm
Logic integrated circuit typePARALLEL IN SERIAL OUT
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
propagation delay (tpd)16.5 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width3.95 mm
minfmax60 MHz
Base Number Matches1
HD74AC165/HD74ACT165
Parallel-Load 8-bit Shift Register
ADE-205-374 (Z)
1st. Edition
Sep. 2000
Description
This 8-bit serial shift register shifts data from Q
A
to Q
H
when clocked, Parallel inputs to each stage are
enabled by a low level at the Shift/Load Input. Also included is a gated clock input and a complementary
output from the eighth bit.
Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit
function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with
the Shift/Load input high enables the other clock input. Data transfer occurs on the positive going edge of
the clock. Parallel loading is inhibited as long as the Shift/Load input is high. When taken low, data at the
parallel inputs is loaded directly into the register independent of the state of the clock.
Features
Outputs Source/Sink 24 mA
HD74ACT165 has TTL-Compatible Inputs

HD74ACT165RP Related Products

HD74ACT165RP HD74AC165T HD74AC165FP HD74AC165P HD74ACT165P HD74AC165RP HD74ACT165FP
Description Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DN Parallel In Serial Out, AC Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, TTP-16DA Parallel In Serial Out, AC Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DA Parallel In Serial Out, AC Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDIP16, DP-16 Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDIP16, DP-16 Parallel In Serial Out, AC Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DN Parallel In Serial Out, ACT Series, 8-Bit, Right Direction, Complementary Output, CMOS, PDSO16, FP-16DA
Parts packaging code SOIC SOIC SOIC DIP DIP SOIC SOIC
package instruction SOP, TSSOP, SOP, SOP16,.4 DIP, DIP16,.3 DIP, DIP16,.3 SOP, SOP, SOP16,.4
Contacts 16 16 16 16 16 16 16
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown
Other features CLOCK INHIBIT ALSO OPRATES AT 5V VCC NOMINAL; CLOCK INHIBIT ALSO OPRATES AT 5V VCC NOMINAL; CLOCK INHIBIT ALSO OPRATES AT 5V VCC NOMINAL; CLOCK INHIBIT CLOCK INHIBIT ALSO OPRATES AT 5V VCC NOMINAL; CLOCK INHIBIT CLOCK INHIBIT
Counting direction RIGHT RIGHT RIGHT RIGHT RIGHT RIGHT RIGHT
series ACT AC AC AC ACT AC ACT
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDIP-T16 R-PDIP-T16 R-PDSO-G16 R-PDSO-G16
length 9.9 mm 5 mm 10.06 mm 19.2 mm 19.2 mm 9.9 mm 10.06 mm
Logic integrated circuit type PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT
Number of digits 8 8 8 8 8 8 8
Number of functions 1 1 1 1 1 1 1
Number of terminals 16 16 16 16 16 16 16
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSSOP SOP DIP DIP SOP SOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE IN-LINE IN-LINE SMALL OUTLINE SMALL OUTLINE
propagation delay (tpd) 16.5 ns 21.5 ns 21.5 ns 21.5 ns 16.5 ns 21.5 ns 16.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.1 mm 2.2 mm 5.06 mm 5.06 mm 1.75 mm 2.2 mm
Maximum supply voltage (Vsup) 5.5 V 3.6 V 3.6 V 3.6 V 5.5 V 3.6 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 3 V 3 V 3 V 4.5 V 3 V 4.5 V
Nominal supply voltage (Vsup) 5 V 3.3 V 3.3 V 3.3 V 5 V 3.3 V 5 V
surface mount YES YES YES NO NO YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING THROUGH-HOLE THROUGH-HOLE GULL WING GULL WING
Terminal pitch 1.27 mm 0.65 mm 1.27 mm 2.54 mm 2.54 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width 3.95 mm 4.4 mm 5.5 mm 7.62 mm 7.62 mm 3.95 mm 5.5 mm
minfmax 60 MHz 90 MHz 90 MHz 90 MHz 60 MHz 90 MHz 60 MHz
Base Number Matches 1 1 1 1 1 - -
Maker - Hitachi (Renesas ) Hitachi (Renesas ) Hitachi (Renesas ) - Hitachi (Renesas ) Hitachi (Renesas )
Is it Rohs certified? - - incompatible incompatible incompatible - incompatible
JESD-609 code - - e0 e0 e0 - e0
Maximum Frequency@Nom-Sup - - 70000000 Hz 70000000 Hz 60000000 Hz - 60000000 Hz
Encapsulate equivalent code - - SOP16,.4 DIP16,.3 DIP16,.3 - SOP16,.4
Terminal surface - - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb)

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