21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Fast CMOS
Buffer/Clock Driver
Product Features
Low output skew: 0.8ns
Clock busing with Hi-Z state control
TTL input and output levels, reducing problematic
ground bounce
High output drive, I
OL
= 64mA
Extremely low static power (1mW, typ.)
Hysteresis on all inputs
Packages available:
16-pin 300 mil wide plastic SOIC (S)
16-pin 150 mil wide QSOP (Q)
Product Description
Pericom Semiconductors PI49FCT series of logic circuits are
produced using the Companys advanced 0.8 micron CMOS
technology, achieving industry leading speed grades.
The PI49FCT804T is a non-inverting clock driver designed with two
independent groups of buffers. These buffers have Hi-Z state
Output Enable inputs (active LOW) with a 1-in, 4-out configuration
per group. Each clock driver consists of two banks of drivers,
driving four outputs each from a standard TTL compatible CMOS
input.
Logic Block Diagram
OE
A
4
IN
A
OA
3
-OA
0
Product Pin Configuration
OA0
OA1
OA2
GND
1
2
3
4
5
6
7
8
16
15
VCC
OB0
OB1
OB2
GND
OB3
OEB
INB
16-Pin
P, S
14
13
12
11
10
9
4
IN
B
OE
B
OB
3
-OB
0
OA3
GND
OEA
INA
Product Pin Description
Pin N ame
O E
A
, O E
B
IN
A
, IN
B
O A
N
, O B
N
GN D
V
CC
C lock Inputs
C lock O utputs
Ground
Power
D e s cription
Hi- Z State O utput Enable Inputs (Active LO W)
Truth Table
(1)
Inputs
OE
A
, OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
Outputs
OA
N
, OB
N
L
H
Z
Z
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
1
PS7005B
06/26/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Buffer/Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................ 65°C to +150°C
Ambient Temperature with Power Applied ........................... 0°C to +70°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) 0.5V to +7.0V
DC Input Voltage .................................................................0.5V to +7.0V
DC Output Current .......................................................................... 120mA
Power Dissipation ...............................................................................0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation
of the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%)
Parameters Description
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
I
OS
V
H
Output HIGH Voltage
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Input HIGH Current
Clamp Diode Voltage
Short Circuit Current
Input Hysteresis
V
CC
= Max., V
IN
=V
CC
(Max.)
V
CC
= Min., I
IN
= 18 mA
V
CC
= Max.
(3)
, V
OUT
= GND
V
CC
= 5V
60
0.7
120
200
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
IN
= V
CC
V
IN
= GND
V
OUT
= V
CC
V
OUT
= GND
I
OH
= 24.0mA
I
OL
= 64mA
2.0
0.8
1
1
1
1
20
1.2
225
Min.
2.4
Typ.
(2)
3.3
0.3
0.55
Max.
Units
V
V
V
V
µA
µA
µA
µA
µA
V
mA
m
V
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
2
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Buffer/Clock Driver
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
A
= OE
B
= GND
Per Output Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
I
= 10 MH
Z
50% Duty Cycle
OE
A
= OE
B
= GND
Four Outputs Toggling
V
CC
= Max.,
Outputs Open
f
I
= 2.5 MH
Z
50% Duty Cycle
OE
A
= OE
B
= GND
Eight Outputs
Toggling
Test Conditions
(1)
V
IN
= GND or V
CC
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ.
(2)
3
0.5
0.15
Max.
30
2.0
0.25
Units
µA
mA
mA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
6.2
6.4
11.2
(5)
12
(5)
mA
3.1
6.3
(5)
3.5
7.6
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
3
PS7005B
06/26/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Buffer/Clock Driver
PI49FCT804T Switching Characteristics over Operating Range
804T
Com.
Parame te rs
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SKEW(O)(3)
t
SKEW(p)(3)
t
SKEW(t)(3)
D e s cription
Propagation Delay
IN
A
to O A
N
, O E
B
to O B
N
O utput Enable Time
O E
A
to O A
N
, O E
B
to O B
N
O utput Disable Time
O E
A
to O A
N
, O E
B
to O B
N
Skew between two outputs of same package
(same transition)
Skew between opposite transitions (t
PHL
- t
PLH
)of
the same package
Skew between two outputs of different packages
at same temperature (same transition)
CL = 50pF
RL = 500
Ω
Conditions
(1)
M in.
1.5
1.5
1.5
M ax.
6.5
8.0
7.0
0.8
1.0
1.6
804AT
Com.
M in.
1.5
1.5
1.5
M ax.
5.8
8.0
7.0
ns
0.7
0.8
1.4
Units
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
Tests Circuits For All Outputs
(1)
V
CC
7.0V
Switch Position
Test
Open Drain
Disable LOW
Enable LOW
All Other Inputs
Switch
Closed
Open
500Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500Ω
V
OUT
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to ZOUT of the
Pulse Generator.
4
PS7005B
06/26/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Buffer/Clock Driver
Switching Waveforms
Propagation Delay
3V
Input
t
PLH
Output
t
PHL
V
OH
1.5V
V
OL
Oy
t
PLHy
t
PHLy
Output Skew t
SK
(o)
3V
Input
t
PLHx
Ox
t
SK(o)
t
SK(o)
V
OH
1.5V
V
OL
t
PHLx
V
OH
1.5V
V
OL
1.5V
0V
1.5V
0V
Enable and Disable Times
Enable
OE
t
PZL
Output
Normally
Low
Output
Normally
High
3.5V
Switch
Closed
t
PZH
Switch
Open
1.5V
0V
0V
1.5V
0.3V
t
PHZ
0.3V
V
OH
Output
Disable
3V
1.5V
0V
t
PLZ
3.5V
V
OL
Input
t
SK(o)
= | t
PLHy
– t
PLHx
| or | t
PHLy
– t
PHLx
|
Pulse Skew t
SK
(p)
3V
1.5V
0V
t
PLH
t
PHL
V
OH
1.5V
V
OL
t
SK(p)
= | t
PHL
– t
PLH
|
Package Skew t
SK
(t)
3V
Input
t
PLH1
Package 1
Output
t
SK(t)
Package 2
Output
t
PLH2
t
PHL2
t
SK(t)
V
OH
1.5V
V
OL
t
PHL1
V
OH
1.5V
V
OL
1.5V
0V
t
SK(t)
= | t
PLH2
– t
PLH1
| or | t
PHL2
– t
PHL1
|
5
PS7005B
06/26/01
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