EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LT6557CGN
LT6557IGN
GN PART MARKING
6557
6557I
ORDER PART NUMBER
LT6557CDHC
LT6557IDHC
DHC PART MARKING*
6557
6557
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
= 5V, R
L
= 150Ω to V
S
/2, V
EN
= 0.4V, R
BCV
= open, unless
otherwise noted.
SYMBOL
V
OS
I
IN
R
IN
C
IN
PARAMETER
Input Offset Voltage
Input Current
Input Resistance
Input Capacitance
CONDITIONS
V
IN
= 1.25V
V
IN
= 1.25V
V
IN
= 0.75V to 1.75V, BCV (Pin 6) Open
f = 1MHz
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
TYP
12
15
35
45
MAX
40
50
70
100
UNITS
mV
mV
µA
µA
kΩ
kΩ
pF
6557fa
90
50
200
150
1.5
2
LT6557
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
S
= 5V, R
L
= 150Ω to V
S
/2, V
EN
= 0.4V, R
BCV
= open, unless
otherwise noted.
SYMBOL
A
V
ERR
A
V
MATCH
V
IN(DC)
PSRR
V
OL
V
OH
I
S
PARAMETER
Gain Error
Gain Match Between Channels
Input Voltage Bias
Power Supply Rejection Ratio
Output Voltage Swing Low
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
V
IN
= 0.75V to 1.75V
V
IN
= 0.75V to 1.75V
R
BCV
= 348Ω
V
S
= 4V to 6V, V
IN
= 1.25V
●
●
●
●
MIN
TYP
±0.5
±0.5
±0.4
±0.4
MAX
±2.5
±3.0
±2.75
±3.25
1.5
1.7
UNITS
%
%
%
%
V
V
dB
dB
1.0
0.8
42
38
1.25
1.10
50
47
0.8
0.9
0.9
1.0
V
V
V
V
Output Voltage Swing High
●
4.1
4.0
4.2
4.1
22.5
25.0
10
10
25
29
450
1000
Supply Current per Amplifier
Total Supply Current (Disabled)
V
EN
= 0.4V, R
L
= ∞, Includes I
S
of V
+
(Pin 15)
V
EN
= Open, R
L
= ∞
V
EN
= 0.4V
●
●
●
●
mA
mA
µA
µA
µA
µA
mA
mA
V/µs
MHz
MHz
MHz
MHz
dB
dB
ns
ns
ps
%
Deg
dBc
dBc
I
EN
I
SC
SR
–3dB BW
0.1dB BW
FPBW
XTalk
t
S
t
r
, t
f
ΔG
ΔΦ
HD2
HD3
Enable Pin Current
Short-Circuit Current
Slew Rate
–3dB Bandwidth
Gain Flatness ±0.1dB Bandwidth
Full Power Bandwidth
All Hostile Crosstalk
Settling Time
Rise Time, Fall Time
Differential Gain
Differential Phase
2nd Harmonic Distortion
3rd Harmonic Distortion
–250
–300
±70
±40
1400
–125
–150
±100
±90
2200
400
500
120
V
OUT
= 1.25V to 3.75V (Note 5)
V
OUT
= 2V
P-P
V
OUT
= 0.2V
P-P
V
OUT
= 2V
P-P
V
OUT
= 2V
P-P
(Note 6)
f = 10MHz, V
OUT
= 2V
P-P
f = 100MHz, V
OUT
= 2V
P-P
To 1%, V
OUT
= 1.5V to 3.5V
To 0.1%
10% to 90%, V
OUT
= 1.5V to 3.5V
NTSC Signal
NTSC Signal
f = 10MHz, V
OUT
= 2V
P-P
f = 10MHz, V
OUT
= 2V
P-P
220
350
–80
–55
4
7
875
0.02
0.05
–68
–75
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
A heat sink may be required to keep the junction temperature
below the Absolute Maximum Rating.
Note 3:
The LT6557C is guaranteed functional over the temperature range
of –40°C and 85°C.
Note 4:
The LT6557C is guaranteed to meet specified performance from
0°C to 70°C. The LT6557C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures.The LT6557I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 5:
Slew rate is 100% production tested on the R channel and
measured on the rising edge of the output signal. The slew rate of the
falling edge and of the G and B channels is guaranteed through design and
characterization.
Note 6:
Large-signal bandwidth is calculated from slew rate:
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FPGA/CPLD
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